drivers/iio/resolver/ad2s90.c
Source file repositories/reference/linux-study-clean/drivers/iio/resolver/ad2s90.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/iio/resolver/ad2s90.c- Extension
.c- Size
- 3048 bytes
- Lines
- 131
- Domain
- Driver Families
- Bucket
- drivers/iio
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/types.hlinux/mutex.hlinux/device.hlinux/spi/spi.hlinux/slab.hlinux/sysfs.hlinux/module.hlinux/iio/iio.hlinux/iio/sysfs.h
Detected Declarations
struct ad2s90_statefunction ad2s90_read_rawfunction ad2s90_probe
Annotated Snippet
struct ad2s90_state {
struct mutex lock; /* lock to protect rx buffer */
struct spi_device *sdev;
u8 rx[2] __aligned(IIO_DMA_MINALIGN);
};
static int ad2s90_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val,
int *val2,
long m)
{
int ret;
struct ad2s90_state *st = iio_priv(indio_dev);
if (chan->type != IIO_ANGL)
return -EINVAL;
switch (m) {
case IIO_CHAN_INFO_SCALE:
/* 2 * Pi / 2^12 */
*val = 6283; /* mV */
*val2 = 12;
return IIO_VAL_FRACTIONAL_LOG2;
case IIO_CHAN_INFO_RAW:
mutex_lock(&st->lock);
ret = spi_read(st->sdev, st->rx, 2);
if (ret < 0) {
mutex_unlock(&st->lock);
return ret;
}
*val = (((u16)(st->rx[0])) << 4) | ((st->rx[1] & 0xF0) >> 4);
mutex_unlock(&st->lock);
return IIO_VAL_INT;
default:
break;
}
return -EINVAL;
}
static const struct iio_info ad2s90_info = {
.read_raw = ad2s90_read_raw,
};
static const struct iio_chan_spec ad2s90_chan = {
.type = IIO_ANGL,
.indexed = 1,
.channel = 0,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
};
static int ad2s90_probe(struct spi_device *spi)
{
struct iio_dev *indio_dev;
struct ad2s90_state *st;
if (spi->max_speed_hz > AD2S90_MAX_SPI_FREQ_HZ) {
dev_err(&spi->dev, "SPI CLK, %d Hz exceeds %d Hz\n",
spi->max_speed_hz, AD2S90_MAX_SPI_FREQ_HZ);
return -EINVAL;
}
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
if (!indio_dev)
return -ENOMEM;
st = iio_priv(indio_dev);
spi_set_drvdata(spi, indio_dev);
mutex_init(&st->lock);
st->sdev = spi;
indio_dev->info = &ad2s90_info;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = &ad2s90_chan;
indio_dev->num_channels = 1;
indio_dev->name = spi_get_device_id(spi)->name;
return devm_iio_device_register(indio_dev->dev.parent, indio_dev);
}
static const struct of_device_id ad2s90_of_match[] = {
{ .compatible = "adi,ad2s90", },
{ }
};
MODULE_DEVICE_TABLE(of, ad2s90_of_match);
static const struct spi_device_id ad2s90_id[] = {
{ "ad2s90" },
Annotation
- Immediate include surface: `linux/types.h`, `linux/mutex.h`, `linux/device.h`, `linux/spi/spi.h`, `linux/slab.h`, `linux/sysfs.h`, `linux/module.h`, `linux/iio/iio.h`.
- Detected declarations: `struct ad2s90_state`, `function ad2s90_read_raw`, `function ad2s90_probe`.
- Atlas domain: Driver Families / drivers/iio.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.