drivers/iio/temperature/max31865.c

Source file repositories/reference/linux-study-clean/drivers/iio/temperature/max31865.c

File Facts

System
Linux kernel
Corpus path
drivers/iio/temperature/max31865.c
Extension
.c
Size
7893 bytes
Lines
352
Domain
Driver Families
Bucket
drivers/iio
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct max31865_data {
	struct spi_device *spi;
	struct mutex lock;
	bool filter_50hz;
	bool three_wire;
	u8 buf[2] __aligned(IIO_DMA_MINALIGN);
};

static int max31865_read(struct max31865_data *data, u8 reg,
			 unsigned int read_size)
{
	return spi_write_then_read(data->spi, &reg, 1, data->buf, read_size);
}

static int max31865_write(struct max31865_data *data, size_t len)
{
	return spi_write(data->spi, data->buf, len);
}

static int enable_bias(struct max31865_data *data)
{
	u8 cfg;
	int ret;

	ret = max31865_read(data, MAX31865_CFG_REG, 1);
	if (ret)
		return ret;

	cfg = data->buf[0];

	data->buf[0] = MAX31865_CFG_REG | MAX31865_RD_WR_BIT;
	data->buf[1] = cfg | MAX31865_CFG_VBIAS;

	return max31865_write(data, 2);
}

static int disable_bias(struct max31865_data *data)
{
	u8 cfg;
	int ret;

	ret = max31865_read(data, MAX31865_CFG_REG, 1);
	if (ret)
		return ret;

	cfg = data->buf[0];
	cfg &= ~MAX31865_CFG_VBIAS;

	data->buf[0] = MAX31865_CFG_REG | MAX31865_RD_WR_BIT;
	data->buf[1] = cfg;

	return max31865_write(data, 2);
}

static int max31865_rtd_read(struct max31865_data *data, int *val)
{
	u8 reg;
	int ret;

	/* Enable BIAS to start the conversion */
	ret = enable_bias(data);
	if (ret)
		return ret;

	/* wait 10.5ms before initiating the conversion */
	msleep(11);

	ret = max31865_read(data, MAX31865_CFG_REG, 1);
	if (ret)
		return ret;

	reg = data->buf[0];
	reg |= MAX31865_CFG_1SHOT | MAX31865_FAULT_STATUS_CLEAR;
	data->buf[0] = MAX31865_CFG_REG | MAX31865_RD_WR_BIT;
	data->buf[1] = reg;

	ret = max31865_write(data, 2);
	if (ret)
		return ret;

	if (data->filter_50hz) {
		/* 50Hz filter mode requires 62.5ms to complete */
		msleep(63);
	} else {
		/* 60Hz filter mode requires 52ms to complete */
		msleep(52);
	}

	ret = max31865_read(data, MAX31865_RTD_MSB, 2);
	if (ret)

Annotation

Implementation Notes