drivers/infiniband/hw/hns/hns_roce_cmd.h
Source file repositories/reference/linux-study-clean/drivers/infiniband/hw/hns/hns_roce_cmd.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/infiniband/hw/hns/hns_roce_cmd.h- Extension
.h- Size
- 5077 bytes
- Lines
- 159
- Domain
- Driver Families
- Bucket
- drivers/infiniband
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _HNS_ROCE_CMD_H
#define _HNS_ROCE_CMD_H
#define HNS_ROCE_MAILBOX_SIZE 4096
#define HNS_ROCE_CMD_TIMEOUT_MSECS 10000
enum {
/* QPC BT commands */
HNS_ROCE_CMD_WRITE_QPC_BT0 = 0x0,
HNS_ROCE_CMD_WRITE_QPC_BT1 = 0x1,
HNS_ROCE_CMD_WRITE_QPC_BT2 = 0x2,
HNS_ROCE_CMD_READ_QPC_BT0 = 0x4,
HNS_ROCE_CMD_READ_QPC_BT1 = 0x5,
HNS_ROCE_CMD_READ_QPC_BT2 = 0x6,
HNS_ROCE_CMD_DESTROY_QPC_BT0 = 0x8,
HNS_ROCE_CMD_DESTROY_QPC_BT1 = 0x9,
HNS_ROCE_CMD_DESTROY_QPC_BT2 = 0xa,
/* QPC operation */
HNS_ROCE_CMD_MODIFY_QPC = 0x41,
HNS_ROCE_CMD_QUERY_QPC = 0x42,
HNS_ROCE_CMD_MODIFY_CQC = 0x52,
HNS_ROCE_CMD_QUERY_CQC = 0x53,
/* CQC BT commands */
HNS_ROCE_CMD_WRITE_CQC_BT0 = 0x10,
HNS_ROCE_CMD_WRITE_CQC_BT1 = 0x11,
HNS_ROCE_CMD_WRITE_CQC_BT2 = 0x12,
HNS_ROCE_CMD_READ_CQC_BT0 = 0x14,
HNS_ROCE_CMD_READ_CQC_BT1 = 0x15,
HNS_ROCE_CMD_READ_CQC_BT2 = 0x1b,
HNS_ROCE_CMD_DESTROY_CQC_BT0 = 0x18,
HNS_ROCE_CMD_DESTROY_CQC_BT1 = 0x19,
HNS_ROCE_CMD_DESTROY_CQC_BT2 = 0x1a,
/* MPT BT commands */
HNS_ROCE_CMD_WRITE_MPT_BT0 = 0x20,
HNS_ROCE_CMD_WRITE_MPT_BT1 = 0x21,
HNS_ROCE_CMD_WRITE_MPT_BT2 = 0x22,
HNS_ROCE_CMD_READ_MPT_BT0 = 0x24,
HNS_ROCE_CMD_READ_MPT_BT1 = 0x25,
HNS_ROCE_CMD_READ_MPT_BT2 = 0x26,
HNS_ROCE_CMD_DESTROY_MPT_BT0 = 0x28,
HNS_ROCE_CMD_DESTROY_MPT_BT1 = 0x29,
HNS_ROCE_CMD_DESTROY_MPT_BT2 = 0x2a,
/* CQC TIMER commands */
HNS_ROCE_CMD_WRITE_CQC_TIMER_BT0 = 0x23,
HNS_ROCE_CMD_READ_CQC_TIMER_BT0 = 0x27,
/* MPT commands */
HNS_ROCE_CMD_QUERY_MPT = 0x62,
/* SRQC BT commands */
HNS_ROCE_CMD_WRITE_SRQC_BT0 = 0x30,
HNS_ROCE_CMD_WRITE_SRQC_BT1 = 0x31,
HNS_ROCE_CMD_WRITE_SRQC_BT2 = 0x32,
HNS_ROCE_CMD_READ_SRQC_BT0 = 0x34,
HNS_ROCE_CMD_READ_SRQC_BT1 = 0x35,
HNS_ROCE_CMD_READ_SRQC_BT2 = 0x36,
HNS_ROCE_CMD_DESTROY_SRQC_BT0 = 0x38,
HNS_ROCE_CMD_DESTROY_SRQC_BT1 = 0x39,
HNS_ROCE_CMD_DESTROY_SRQC_BT2 = 0x3a,
/* QPC TIMER commands */
HNS_ROCE_CMD_WRITE_QPC_TIMER_BT0 = 0x33,
HNS_ROCE_CMD_READ_QPC_TIMER_BT0 = 0x37,
/* EQC commands */
HNS_ROCE_CMD_CREATE_AEQC = 0x80,
HNS_ROCE_CMD_MODIFY_AEQC = 0x81,
HNS_ROCE_CMD_QUERY_AEQC = 0x82,
HNS_ROCE_CMD_DESTROY_AEQC = 0x83,
HNS_ROCE_CMD_CREATE_CEQC = 0x90,
HNS_ROCE_CMD_MODIFY_CEQC = 0x91,
HNS_ROCE_CMD_QUERY_CEQC = 0x92,
HNS_ROCE_CMD_DESTROY_CEQC = 0x93,
/* SCC CTX commands */
HNS_ROCE_CMD_QUERY_SCCC = 0xa2,
/* SCC CTX BT commands */
HNS_ROCE_CMD_READ_SCCC_BT0 = 0xa4,
HNS_ROCE_CMD_WRITE_SCCC_BT0 = 0xa5,
};
enum {
/* TPT commands */
HNS_ROCE_CMD_CREATE_MPT = 0xd,
HNS_ROCE_CMD_DESTROY_MPT = 0xf,
Annotation
- Atlas domain: Driver Families / drivers/infiniband.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.