drivers/infiniband/hw/hns/hns_roce_common.h

Source file repositories/reference/linux-study-clean/drivers/infiniband/hw/hns/hns_roce_common.h

File Facts

System
Linux kernel
Corpus path
drivers/infiniband/hw/hns/hns_roce_common.h
Extension
.h
Size
7652 bytes
Lines
200
Domain
Driver Families
Bucket
drivers/infiniband
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _HNS_ROCE_COMMON_H
#define _HNS_ROCE_COMMON_H
#include <linux/bitfield.h>

#define roce_write(dev, reg, val)	writel((val), (dev)->reg_base + (reg))
#define roce_read(dev, reg)		readl((dev)->reg_base + (reg))
#define roce_raw_write(value, addr) \
	__raw_writel((__force u32)cpu_to_le32(value), (addr))

#define roce_get_field(origin, mask, shift)                                    \
	((le32_to_cpu(origin) & (mask)) >> (u32)(shift))

#define roce_get_bit(origin, shift) \
	roce_get_field((origin), (1ul << (shift)), (shift))

#define roce_set_field(origin, mask, shift, val)                               \
	do {                                                                   \
		(origin) &= ~cpu_to_le32(mask);                                \
		(origin) |=                                                    \
			cpu_to_le32(((u32)(val) << (u32)(shift)) & (mask));    \
	} while (0)

#define roce_set_bit(origin, shift, val)                                       \
	roce_set_field((origin), (1ul << (shift)), (shift), (val))

#define FIELD_LOC(field_type, field_h, field_l) field_type, field_h, field_l

#define _hr_reg_enable(ptr, field_type, field_h, field_l)                      \
	({                                                                     \
		const field_type *_ptr = ptr;                                  \
		*((__le32 *)_ptr + (field_h) / 32) |= cpu_to_le32(             \
			BIT((field_l) % 32) +                                  \
			BUILD_BUG_ON_ZERO((field_h) != (field_l)));            \
	})

#define hr_reg_enable(ptr, field) _hr_reg_enable(ptr, field)

#define _hr_reg_clear(ptr, field_type, field_h, field_l)                       \
	({                                                                     \
		const field_type *_ptr = ptr;                                  \
		BUILD_BUG_ON(((field_h) / 32) != ((field_l) / 32));            \
		*((__le32 *)_ptr + (field_h) / 32) &=                          \
			~cpu_to_le32(GENMASK((field_h) % 32, (field_l) % 32)); \
	})

#define hr_reg_clear(ptr, field) _hr_reg_clear(ptr, field)

#define _hr_reg_write_bool(ptr, field_type, field_h, field_l, val)             \
	({                                                                     \
		(val) ? _hr_reg_enable(ptr, field_type, field_h, field_l) :    \
			_hr_reg_clear(ptr, field_type, field_h, field_l);      \
	})

#define hr_reg_write_bool(ptr, field, val) _hr_reg_write_bool(ptr, field, val)

#define _hr_reg_write(ptr, field_type, field_h, field_l, val)                  \
	({                                                                     \
		_hr_reg_clear(ptr, field_type, field_h, field_l);              \
		*((__le32 *)ptr + (field_h) / 32) |= cpu_to_le32(FIELD_PREP(   \
			GENMASK((field_h) % 32, (field_l) % 32), val));        \
	})

#define hr_reg_write(ptr, field, val) _hr_reg_write(ptr, field, val)

#define _hr_reg_read(ptr, field_type, field_h, field_l)                        \
	({                                                                     \
		const field_type *_ptr = ptr;                                  \
		BUILD_BUG_ON(((field_h) / 32) != ((field_l) / 32));            \
		FIELD_GET(GENMASK((field_h) % 32, (field_l) % 32),             \
			  le32_to_cpu(*((__le32 *)_ptr + (field_h) / 32)));    \
	})

#define hr_reg_read(ptr, field) _hr_reg_read(ptr, field)

/*************ROCEE_REG DEFINITION****************/
#define ROCEE_VENDOR_ID_REG			0x0
#define ROCEE_VENDOR_PART_ID_REG		0x4

#define ROCEE_SYS_IMAGE_GUID_L_REG		0xC
#define ROCEE_SYS_IMAGE_GUID_H_REG		0x10

#define ROCEE_PORT_GID_L_0_REG			0x50
#define ROCEE_PORT_GID_ML_0_REG			0x54
#define ROCEE_PORT_GID_MH_0_REG			0x58
#define ROCEE_PORT_GID_H_0_REG			0x5C

#define ROCEE_BT_CMD_H_REG			0x204

#define ROCEE_SMAC_L_0_REG			0x240
#define ROCEE_SMAC_H_0_REG			0x244

Annotation

Implementation Notes