drivers/infiniband/hw/hns/hns_roce_hw_v2.h
Source file repositories/reference/linux-study-clean/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/infiniband/hw/hns/hns_roce_hw_v2.h- Extension
.h- Size
- 54434 bytes
- Lines
- 1627
- Domain
- Driver Families
- Bucket
- drivers/infiniband
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitops.hhnae3.hhns_roce_bond.h
Detected Declarations
struct hns_roce_cmdq_tx_timeout_mapstruct hns_roce_cmd_errcodestruct hns_roce_v2_cq_contextstruct hns_roce_srq_contextstruct hns_roce_v2_qp_context_exstruct hns_roce_v2_qp_contextstruct hns_roce_v2_scc_contextstruct hns_roce_v2_cqestruct hns_roce_v2_mpt_entrystruct hns_roce_v2_dbstruct hns_roce_v2_ud_send_wqestruct hns_roce_v2_rc_send_wqestruct hns_roce_wqe_frmr_segstruct hns_roce_v2_wqe_data_segstruct hns_roce_query_versionstruct hns_roce_query_fw_infostruct hns_roce_func_clearstruct hns_roce_vf_switchstruct hns_roce_post_mboxstruct hns_roce_mbox_statusstruct hns_roce_cfg_sgid_tbstruct hns_roce_cfg_smac_tbstruct hns_roce_cfg_gmv_tb_astruct hns_roce_cfg_gmv_tb_bstruct hns_roce_query_pf_caps_astruct hns_roce_query_pf_caps_bstruct hns_roce_query_pf_caps_cstruct hns_roce_query_pf_caps_dstruct hns_roce_congestion_algorithmstruct hns_roce_query_pf_caps_estruct hns_roce_query_pf_caps_fstruct hns_roce_cmq_reqstruct hns_roce_cmq_descstruct hns_roce_v2_cmq_ringstruct hns_roce_v2_cmqstruct hns_roce_link_tablestruct hns_roce_v2_free_mrstruct hns_roce_v2_privstruct hns_roce_dipstruct fmea_ram_eccstruct hns_roce_eq_contextstruct hns_roce_wqe_atomic_segstruct hns_roce_sccc_clrstruct hns_roce_sccc_clr_donestruct hns_roce_bond_infoenum hns_roce_opcode_typeenum hns_roce_cmd_return_statusenum hns_roce_sgid_type
Annotated Snippet
struct hns_roce_cmdq_tx_timeout_map {
u16 opcode;
u32 tx_timeout;
};
enum {
TYPE_CRQ,
TYPE_CSQ,
};
enum hns_roce_cmd_return_status {
CMD_EXEC_SUCCESS,
CMD_NO_AUTH,
CMD_NOT_EXIST,
CMD_CRQ_FULL,
CMD_NEXT_ERR,
CMD_NOT_EXEC,
CMD_PARA_ERR,
CMD_RESULT_ERR,
CMD_TIMEOUT,
CMD_HILINK_ERR,
CMD_INFO_ILLEGAL,
CMD_INVALID,
CMD_ROH_CHECK_FAIL,
CMD_OTHER_ERR = 0xff
};
struct hns_roce_cmd_errcode {
enum hns_roce_cmd_return_status return_status;
int errno;
};
enum hns_roce_sgid_type {
GID_TYPE_FLAG_ROCE_V1 = 0,
GID_TYPE_FLAG_ROCE_V2_IPV4,
GID_TYPE_FLAG_ROCE_V2_IPV6,
};
struct hns_roce_v2_cq_context {
__le32 byte_4_pg_ceqn;
__le32 byte_8_cqn;
__le32 cqe_cur_blk_addr;
__le32 byte_16_hop_addr;
__le32 cqe_nxt_blk_addr;
__le32 byte_24_pgsz_addr;
__le32 byte_28_cq_pi;
__le32 byte_32_cq_ci;
__le32 cqe_ba;
__le32 byte_40_cqe_ba;
__le32 byte_44_db_record;
__le32 db_record_addr;
__le32 byte_52_cqe_cnt;
__le32 byte_56_cqe_period_maxcnt;
__le32 cqe_report_timer;
__le32 byte_64_se_cqe_idx;
};
#define CQC_CQE_BA_L_S 3
#define CQC_CQE_BA_H_S (32 + CQC_CQE_BA_L_S)
#define CQC_CQE_DB_RECORD_ADDR_H_S 32
#define HNS_ROCE_V2_CQ_DEFAULT_BURST_NUM 0x0
#define HNS_ROCE_V2_CQ_DEFAULT_INTERVAL 0x0
#define CQC_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_v2_cq_context, h, l)
#define CQC_CQ_ST CQC_FIELD_LOC(1, 0)
#define CQC_POLL CQC_FIELD_LOC(2, 2)
#define CQC_SE CQC_FIELD_LOC(3, 3)
#define CQC_OVER_IGNORE CQC_FIELD_LOC(4, 4)
#define CQC_ARM_ST CQC_FIELD_LOC(7, 6)
#define CQC_SHIFT CQC_FIELD_LOC(12, 8)
#define CQC_CMD_SN CQC_FIELD_LOC(14, 13)
#define CQC_CEQN CQC_FIELD_LOC(23, 15)
#define CQC_CQN CQC_FIELD_LOC(55, 32)
#define CQC_POE_EN CQC_FIELD_LOC(56, 56)
#define CQC_POE_NUM CQC_FIELD_LOC(58, 57)
#define CQC_CQE_SIZE CQC_FIELD_LOC(60, 59)
#define CQC_CQ_CNT_MODE CQC_FIELD_LOC(61, 61)
#define CQC_STASH CQC_FIELD_LOC(63, 63)
#define CQC_CQE_CUR_BLK_ADDR_L CQC_FIELD_LOC(95, 64)
#define CQC_CQE_CUR_BLK_ADDR_H CQC_FIELD_LOC(115, 96)
#define CQC_POE_QID CQC_FIELD_LOC(125, 116)
#define CQC_CQE_HOP_NUM CQC_FIELD_LOC(127, 126)
#define CQC_CQE_NEX_BLK_ADDR_L CQC_FIELD_LOC(159, 128)
#define CQC_CQE_NEX_BLK_ADDR_H CQC_FIELD_LOC(179, 160)
#define CQC_CQE_BAR_PG_SZ CQC_FIELD_LOC(187, 184)
#define CQC_CQE_BUF_PG_SZ CQC_FIELD_LOC(191, 188)
#define CQC_CQ_PRODUCER_IDX CQC_FIELD_LOC(215, 192)
#define CQC_CQ_CONSUMER_IDX CQC_FIELD_LOC(247, 224)
Annotation
- Immediate include surface: `linux/bitops.h`, `hnae3.h`, `hns_roce_bond.h`.
- Detected declarations: `struct hns_roce_cmdq_tx_timeout_map`, `struct hns_roce_cmd_errcode`, `struct hns_roce_v2_cq_context`, `struct hns_roce_srq_context`, `struct hns_roce_v2_qp_context_ex`, `struct hns_roce_v2_qp_context`, `struct hns_roce_v2_scc_context`, `struct hns_roce_v2_cqe`, `struct hns_roce_v2_mpt_entry`, `struct hns_roce_v2_db`.
- Atlas domain: Driver Families / drivers/infiniband.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.