drivers/infiniband/hw/irdma/i40iw_hw.c

Source file repositories/reference/linux-study-clean/drivers/infiniband/hw/irdma/i40iw_hw.c

File Facts

System
Linux kernel
Corpus path
drivers/infiniband/hw/irdma/i40iw_hw.c
Extension
.c
Size
9648 bytes
Lines
262
Domain
Driver Families
Bucket
drivers/infiniband
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
/* Copyright (c) 2015 - 2021 Intel Corporation */
#include "osdep.h"
#include "type.h"
#include "i40iw_hw.h"
#include "protos.h"

static u32 i40iw_regs[IRDMA_MAX_REGS] = {
	I40E_PFPE_CQPTAIL,
	I40E_PFPE_CQPDB,
	I40E_PFPE_CCQPSTATUS,
	I40E_PFPE_CCQPHIGH,
	I40E_PFPE_CCQPLOW,
	I40E_PFPE_CQARM,
	I40E_PFPE_CQACK,
	I40E_PFPE_AEQALLOC,
	I40E_PFPE_CQPERRCODES,
	I40E_PFPE_WQEALLOC,
	I40E_PFINT_DYN_CTLN(0),
	I40IW_DB_ADDR_OFFSET,

	I40E_GLPCI_LBARCTRL,
	I40E_GLPE_CPUSTATUS0,
	I40E_GLPE_CPUSTATUS1,
	I40E_GLPE_CPUSTATUS2,
	I40E_PFINT_AEQCTL,
	I40E_PFINT_CEQCTL(0),
	I40E_VSIQF_CTL(0),
	I40E_PFHMC_PDINV,
	I40E_GLHMC_VFPDINV(0),
	I40E_GLPE_CRITERR,
	0xffffffff      /* PFINT_RATEN not used in FPK */
};

static u32 i40iw_stat_offsets[] = {
	I40E_GLPES_PFIP4RXDISCARD(0),
	I40E_GLPES_PFIP4RXTRUNC(0),
	I40E_GLPES_PFIP4TXNOROUTE(0),
	I40E_GLPES_PFIP6RXDISCARD(0),
	I40E_GLPES_PFIP6RXTRUNC(0),
	I40E_GLPES_PFIP6TXNOROUTE(0),
	I40E_GLPES_PFTCPRTXSEG(0),
	I40E_GLPES_PFTCPRXOPTERR(0),
	I40E_GLPES_PFTCPRXPROTOERR(0),
	I40E_GLPES_PFRXVLANERR(0),

	I40E_GLPES_PFIP4RXOCTSLO(0),
	I40E_GLPES_PFIP4RXPKTSLO(0),
	I40E_GLPES_PFIP4RXFRAGSLO(0),
	I40E_GLPES_PFIP4RXMCPKTSLO(0),
	I40E_GLPES_PFIP4TXOCTSLO(0),
	I40E_GLPES_PFIP4TXPKTSLO(0),
	I40E_GLPES_PFIP4TXFRAGSLO(0),
	I40E_GLPES_PFIP4TXMCPKTSLO(0),
	I40E_GLPES_PFIP6RXOCTSLO(0),
	I40E_GLPES_PFIP6RXPKTSLO(0),
	I40E_GLPES_PFIP6RXFRAGSLO(0),
	I40E_GLPES_PFIP6RXMCPKTSLO(0),
	I40E_GLPES_PFIP6TXOCTSLO(0),
	I40E_GLPES_PFIP6TXPKTSLO(0),
	I40E_GLPES_PFIP6TXFRAGSLO(0),
	I40E_GLPES_PFIP6TXMCPKTSLO(0),
	I40E_GLPES_PFTCPRXSEGSLO(0),
	I40E_GLPES_PFTCPTXSEGLO(0),
	I40E_GLPES_PFRDMARXRDSLO(0),
	I40E_GLPES_PFRDMARXSNDSLO(0),
	I40E_GLPES_PFRDMARXWRSLO(0),
	I40E_GLPES_PFRDMATXRDSLO(0),
	I40E_GLPES_PFRDMATXSNDSLO(0),
	I40E_GLPES_PFRDMATXWRSLO(0),
	I40E_GLPES_PFRDMAVBNDLO(0),
	I40E_GLPES_PFRDMAVINVLO(0),
	I40E_GLPES_PFIP4RXMCOCTSLO(0),
	I40E_GLPES_PFIP4TXMCOCTSLO(0),
	I40E_GLPES_PFIP6RXMCOCTSLO(0),
	I40E_GLPES_PFIP6TXMCOCTSLO(0),
	I40E_GLPES_PFUDPRXPKTSLO(0),
	I40E_GLPES_PFUDPTXPKTSLO(0)
};

static u64 i40iw_masks[IRDMA_MAX_MASKS] = {
	I40E_PFPE_CCQPSTATUS_CCQP_DONE,
	I40E_PFPE_CCQPSTATUS_CCQP_ERR,
	I40E_CQPSQ_STAG_PDID,
	I40E_CQPSQ_CQ_CEQID,
	I40E_CQPSQ_CQ_CQID,
	I40E_COMMIT_FPM_CQCNT,
	I40E_CQPSQ_UPESD_HMCFNID,
};

Annotation

Implementation Notes