drivers/infiniband/hw/irdma/ig3rdma_hw.c
Source file repositories/reference/linux-study-clean/drivers/infiniband/hw/irdma/ig3rdma_hw.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/infiniband/hw/irdma/ig3rdma_hw.c- Extension
.c- Size
- 6152 bytes
- Lines
- 170
- Domain
- Driver Families
- Bucket
- drivers/infiniband
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
osdep.htype.hprotos.hig3rdma_hw.h
Detected Declarations
function ig3rdma_ena_irqfunction ig3rdma_disable_irqfunction ig3rdma_init_hw
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB
/* Copyright (c) 2018 - 2024 Intel Corporation */
#include "osdep.h"
#include "type.h"
#include "protos.h"
#include "ig3rdma_hw.h"
/**
* ig3rdma_ena_irq - Enable interrupt
* @dev: pointer to the device structure
* @idx: vector index
*/
static void ig3rdma_ena_irq(struct irdma_sc_dev *dev, u32 idx)
{
u32 val;
u32 int_stride = 1; /* one u32 per register */
if (dev->is_pf)
int_stride = 0x400;
else
idx--; /* VFs use DYN_CTL_N */
val = FIELD_PREP(IRDMA_GLINT_DYN_CTL_INTENA, 1) |
FIELD_PREP(IRDMA_GLINT_DYN_CTL_CLEARPBA, 1);
writel(val, dev->hw_regs[IRDMA_GLINT_DYN_CTL] + (idx * int_stride));
}
/**
* ig3rdma_disable_irq - Disable interrupt
* @dev: pointer to the device structure
* @idx: vector index
*/
static void ig3rdma_disable_irq(struct irdma_sc_dev *dev, u32 idx)
{
u32 int_stride = 1; /* one u32 per register */
if (dev->is_pf)
int_stride = 0x400;
else
idx--; /* VFs use DYN_CTL_N */
writel(0, dev->hw_regs[IRDMA_GLINT_DYN_CTL] + (idx * int_stride));
}
static const struct irdma_irq_ops ig3rdma_irq_ops = {
.irdma_dis_irq = ig3rdma_disable_irq,
.irdma_en_irq = ig3rdma_ena_irq,
};
static const struct irdma_hw_stat_map ig3rdma_hw_stat_map[] = {
[IRDMA_HW_STAT_INDEX_RXVLANERR] = { 0, 0, 0 },
[IRDMA_HW_STAT_INDEX_IP4RXOCTS] = { 8, 0, 0 },
[IRDMA_HW_STAT_INDEX_IP4RXPKTS] = { 16, 0, 0 },
[IRDMA_HW_STAT_INDEX_IP4RXDISCARD] = { 24, 0, 0 },
[IRDMA_HW_STAT_INDEX_IP4RXTRUNC] = { 32, 0, 0 },
[IRDMA_HW_STAT_INDEX_IP4RXFRAGS] = { 40, 0, 0 },
[IRDMA_HW_STAT_INDEX_IP4RXMCOCTS] = { 48, 0, 0 },
[IRDMA_HW_STAT_INDEX_IP4RXMCPKTS] = { 56, 0, 0 },
[IRDMA_HW_STAT_INDEX_IP6RXOCTS] = { 64, 0, 0 },
[IRDMA_HW_STAT_INDEX_IP6RXPKTS] = { 72, 0, 0 },
[IRDMA_HW_STAT_INDEX_IP6RXDISCARD] = { 80, 0, 0 },
[IRDMA_HW_STAT_INDEX_IP6RXTRUNC] = { 88, 0, 0 },
[IRDMA_HW_STAT_INDEX_IP6RXFRAGS] = { 96, 0, 0 },
[IRDMA_HW_STAT_INDEX_IP6RXMCOCTS] = { 104, 0, 0 },
[IRDMA_HW_STAT_INDEX_IP6RXMCPKTS] = { 112, 0, 0 },
[IRDMA_HW_STAT_INDEX_IP4TXOCTS] = { 120, 0, 0 },
[IRDMA_HW_STAT_INDEX_IP4TXPKTS] = { 128, 0, 0 },
[IRDMA_HW_STAT_INDEX_IP4TXFRAGS] = { 136, 0, 0 },
[IRDMA_HW_STAT_INDEX_IP4TXMCOCTS] = { 144, 0, 0 },
[IRDMA_HW_STAT_INDEX_IP4TXMCPKTS] = { 152, 0, 0 },
[IRDMA_HW_STAT_INDEX_IP6TXOCTS] = { 160, 0, 0 },
[IRDMA_HW_STAT_INDEX_IP6TXPKTS] = { 168, 0, 0 },
[IRDMA_HW_STAT_INDEX_IP6TXFRAGS] = { 176, 0, 0 },
[IRDMA_HW_STAT_INDEX_IP6TXMCOCTS] = { 184, 0, 0 },
[IRDMA_HW_STAT_INDEX_IP6TXMCPKTS] = { 192, 0, 0 },
[IRDMA_HW_STAT_INDEX_IP4TXNOROUTE] = { 200, 0, 0 },
[IRDMA_HW_STAT_INDEX_IP6TXNOROUTE] = { 208, 0, 0 },
[IRDMA_HW_STAT_INDEX_TCPRTXSEG] = { 216, 0, 0 },
[IRDMA_HW_STAT_INDEX_TCPRXOPTERR] = { 224, 0, 0 },
[IRDMA_HW_STAT_INDEX_TCPRXPROTOERR] = { 232, 0, 0 },
[IRDMA_HW_STAT_INDEX_TCPTXSEG] = { 240, 0, 0 },
[IRDMA_HW_STAT_INDEX_TCPRXSEGS] = { 248, 0, 0 },
[IRDMA_HW_STAT_INDEX_UDPRXPKTS] = { 256, 0, 0 },
[IRDMA_HW_STAT_INDEX_UDPTXPKTS] = { 264, 0, 0 },
[IRDMA_HW_STAT_INDEX_RDMARXWRS] = { 272, 0, 0 },
[IRDMA_HW_STAT_INDEX_RDMARXRDS] = { 280, 0, 0 },
[IRDMA_HW_STAT_INDEX_RDMARXSNDS] = { 288, 0, 0 },
[IRDMA_HW_STAT_INDEX_RDMATXWRS] = { 296, 0, 0 },
[IRDMA_HW_STAT_INDEX_RDMATXRDS] = { 304, 0, 0 },
Annotation
- Immediate include surface: `osdep.h`, `type.h`, `protos.h`, `ig3rdma_hw.h`.
- Detected declarations: `function ig3rdma_ena_irq`, `function ig3rdma_disable_irq`, `function ig3rdma_init_hw`.
- Atlas domain: Driver Families / drivers/infiniband.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.