drivers/infiniband/hw/irdma/uda.h

File Facts

System

Linux kernel

Corpus path

drivers/infiniband/hw/irdma/uda.h

Extension

.h

Size

2348 bytes

Lines

88

Domain

Driver Families

Bucket

drivers/infiniband

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• struct irdma_sc_cqp
• struct irdma_ah_info
• struct irdma_sc_ah
• function irdma_sc_init_ah
• function irdma_sc_create_ah
• function irdma_sc_destroy_ah
• function irdma_sc_create_mcast_grp
• function irdma_sc_modify_mcast_grp
• function irdma_sc_destroy_mcast_grp

Annotated Snippet

struct irdma_ah_info {
	struct irdma_sc_vsi *vsi;
	u32 pd_idx;
	u32 dst_arpindex;
	u32 dest_ip_addr[4];
	u32 src_ip_addr[4];
	u32 flow_label;
	u32 ah_idx;
	u16 vlan_tag;
	u8 insert_vlan_tag;
	u8 tc_tos;
	u8 hop_ttl;
	u8 mac_addr[ETH_ALEN];
	bool ah_valid:1;
	bool ipv4_valid:1;
	bool do_lpbk:1;
};

struct irdma_sc_ah {
	struct irdma_sc_dev *dev;
	struct irdma_ah_info ah_info;
};

int irdma_sc_add_mcast_grp(struct irdma_mcast_grp_info *ctx,
			   struct irdma_mcast_grp_ctx_entry_info *mg);
int irdma_sc_del_mcast_grp(struct irdma_mcast_grp_info *ctx,
			   struct irdma_mcast_grp_ctx_entry_info *mg);
int irdma_sc_access_ah(struct irdma_sc_cqp *cqp, struct irdma_ah_info *info,
		       u32 op, u64 scratch);
int irdma_access_mcast_grp(struct irdma_sc_cqp *cqp,
			   struct irdma_mcast_grp_info *info, u32 op,
			   u64 scratch);

static inline void irdma_sc_init_ah(struct irdma_sc_dev *dev, struct irdma_sc_ah *ah)
{
	ah->dev = dev;
}

static inline int irdma_sc_create_ah(struct irdma_sc_cqp *cqp,
				     struct irdma_ah_info *info, u64 scratch)
{
	return irdma_sc_access_ah(cqp, info, IRDMA_CQP_OP_CREATE_ADDR_HANDLE,
				  scratch);
}

static inline int irdma_sc_destroy_ah(struct irdma_sc_cqp *cqp,
				      struct irdma_ah_info *info, u64 scratch)
{
	return irdma_sc_access_ah(cqp, info, IRDMA_CQP_OP_DESTROY_ADDR_HANDLE,
				  scratch);
}

static inline int irdma_sc_create_mcast_grp(struct irdma_sc_cqp *cqp,
					    struct irdma_mcast_grp_info *info,
					    u64 scratch)
{
	return irdma_access_mcast_grp(cqp, info, IRDMA_CQP_OP_CREATE_MCAST_GRP,
				      scratch);
}

static inline int irdma_sc_modify_mcast_grp(struct irdma_sc_cqp *cqp,
					    struct irdma_mcast_grp_info *info,
					    u64 scratch)
{
	return irdma_access_mcast_grp(cqp, info, IRDMA_CQP_OP_MODIFY_MCAST_GRP,
				      scratch);
}

static inline int irdma_sc_destroy_mcast_grp(struct irdma_sc_cqp *cqp,
					     struct irdma_mcast_grp_info *info,
					     u64 scratch)
{
	return irdma_access_mcast_grp(cqp, info, IRDMA_CQP_OP_DESTROY_MCAST_GRP,
				      scratch);
}
#endif /* IRDMA_UDA_H */

Annotation

• Detected declarations: `struct irdma_sc_cqp`, `struct irdma_ah_info`, `struct irdma_sc_ah`, `function irdma_sc_init_ah`, `function irdma_sc_create_ah`, `function irdma_sc_destroy_ah`, `function irdma_sc_create_mcast_grp`, `function irdma_sc_modify_mcast_grp`, `function irdma_sc_destroy_mcast_grp`.
• Atlas domain: Driver Families / drivers/infiniband.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.