drivers/infiniband/hw/mlx5/mr.c
Source file repositories/reference/linux-study-clean/drivers/infiniband/hw/mlx5/mr.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/infiniband/hw/mlx5/mr.c- Extension
.c- Size
- 60145 bytes
- Lines
- 2230
- Domain
- Driver Families
- Bucket
- drivers/infiniband
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/kref.hlinux/random.hlinux/debugfs.hlinux/export.hlinux/delay.hlinux/dma-buf.hlinux/dma-resv.hrdma/frmr_pools.hrdma/ib_umem_odp.hdm.hmlx5_ib.humr.hdata_direct.hdmah.h
Detected Declarations
function Copyrightfunction set_mkc_access_pd_addr_fieldsfunction assign_mkey_variantfunction mlx5_ib_create_mkeyfunction destroy_mkeyfunction get_mkc_octo_sizefunction get_unchangeable_access_flagsfunction _mlx5_frmr_pool_allocfunction mlx5r_create_mkeysfunction mlx5r_destroy_mkeysfunction mlx5r_build_frmr_keyfunction mlx5r_frmr_pools_initfunction mlx5r_frmr_pools_cleanupfunction get_octo_lenfunction set_mr_fieldsfunction mlx5_umem_dmabuf_default_pgszfunction reg_create_crossing_vhca_mrfunction mlx5_ib_advise_mrfunction mlx5_ib_dmabuf_invalidate_cbfunction reg_user_mr_dmabuffunction reg_user_mr_dmabuf_by_data_directfunction can_use_umr_rereg_accessfunction can_use_umr_rereg_pasfunction umr_rereg_pasfunction mlx5_alloc_priv_descsfunction mlx5_free_priv_descsfunction mlx5_ib_revoke_data_direct_mrfunction mlx5_ib_revoke_data_direct_mrsfunction list_for_each_entry_safefunction mlx5_umr_revoke_mr_with_lockfunction mlx5r_handle_mkey_cleanupfunction __mlx5_ib_dereg_mrfunction dereg_crossing_data_direct_mrfunction mlx5_ib_dereg_mrfunction mlx5_set_umr_free_mkeyfunction _mlx5_alloc_mkey_descsfunction mlx5_alloc_mem_reg_descsfunction mlx5_alloc_sg_gaps_descsfunction mlx5_alloc_integrity_descsfunction mlx5_ib_alloc_mwfunction mlx5_ib_dealloc_mwfunction mlx5_ib_check_mr_statusfunction mlx5_ib_map_pa_mr_sg_pifunction mlx5_ib_sg_to_klmsfunction for_each_sgfunction for_each_sgfunction mlx5_set_pagefunction mlx5_set_page_pi
Annotated Snippet
if (WARN_ON(access_flags & IB_ACCESS_ON_DEMAND || ksm_mode)) {
err = -EINVAL;
goto err_2;
}
mlx5_ib_populate_pas(umem, 1UL << mr->page_shift, pas,
pg_cap ? MLX5_IB_MTT_PRESENT : 0);
}
/* The pg_access bit allows setting the access flags
* in the page list submitted with the command.
*/
MLX5_SET(create_mkey_in, in, pg_access, !!(pg_cap));
mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
set_mkc_access_pd_addr_fields(mkc, access_flags, iova,
populate ? pd : dev->umrc.pd);
/* In case a data direct flow, overwrite the pdn field by its internal kernel PD */
if (umem->is_dmabuf && ksm_mode)
MLX5_SET(mkc, mkc, pd, dev->ddr.pdn);
MLX5_SET(mkc, mkc, free, !populate);
MLX5_SET(mkc, mkc, access_mode_1_0, access_mode);
MLX5_SET(mkc, mkc, umr_en, 1);
MLX5_SET64(mkc, mkc, len, umem->length);
MLX5_SET(mkc, mkc, bsf_octword_size, 0);
if (ksm_mode)
MLX5_SET(mkc, mkc, translations_octword_size,
get_octo_len(iova, umem->length, mr->page_shift) * 2);
else
MLX5_SET(mkc, mkc, translations_octword_size,
get_octo_len(iova, umem->length, mr->page_shift));
MLX5_SET(mkc, mkc, log_page_size, mr->page_shift);
if (mlx5_umem_needs_ats(dev, umem, access_flags))
MLX5_SET(mkc, mkc, ma_translation_mode, 1);
if (populate) {
MLX5_SET(create_mkey_in, in, translations_octword_actual_size,
get_octo_len(iova, umem->length, mr->page_shift));
}
if (ph != MLX5_IB_NO_PH) {
MLX5_SET(mkc, mkc, pcie_tph_en, 1);
MLX5_SET(mkc, mkc, pcie_tph_ph, ph);
if (st_index != MLX5_MKC_PCIE_TPH_NO_STEERING_TAG_INDEX)
MLX5_SET(mkc, mkc, pcie_tph_steering_tag_index, st_index);
}
err = mlx5_ib_create_mkey(dev, &mr->mmkey, in, inlen);
if (err) {
mlx5_ib_warn(dev, "create mkey failed\n");
goto err_2;
}
mr->mmkey.type = MLX5_MKEY_MR;
mr->mmkey.ndescs = get_octo_len(iova, umem->length, mr->page_shift);
mr->umem = umem;
set_mr_fields(dev, mr, umem->length, access_flags, iova);
kvfree(in);
mlx5_ib_dbg(dev, "mkey = 0x%x\n", mr->mmkey.key);
return mr;
err_2:
kvfree(in);
err_1:
kfree(mr);
return ERR_PTR(err);
}
static struct ib_mr *mlx5_ib_get_dm_mr(struct ib_pd *pd, u64 start_addr,
u64 length, int acc, int mode)
{
struct mlx5_ib_dev *dev = to_mdev(pd->device);
int inlen = MLX5_ST_SZ_BYTES(create_mkey_in);
struct mlx5_ib_mr *mr;
void *mkc;
u32 *in;
int err;
mr = kzalloc_obj(*mr);
if (!mr)
return ERR_PTR(-ENOMEM);
in = kzalloc(inlen, GFP_KERNEL);
if (!in) {
err = -ENOMEM;
goto err_free;
}
mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/kref.h`, `linux/random.h`, `linux/debugfs.h`, `linux/export.h`, `linux/delay.h`, `linux/dma-buf.h`, `linux/dma-resv.h`.
- Detected declarations: `function Copyright`, `function set_mkc_access_pd_addr_fields`, `function assign_mkey_variant`, `function mlx5_ib_create_mkey`, `function destroy_mkey`, `function get_mkc_octo_size`, `function get_unchangeable_access_flags`, `function _mlx5_frmr_pool_alloc`, `function mlx5r_create_mkeys`, `function mlx5r_destroy_mkeys`.
- Atlas domain: Driver Families / drivers/infiniband.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.