drivers/infiniband/hw/mlx5/odp.c
Source file repositories/reference/linux-study-clean/drivers/infiniband/hw/mlx5/odp.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/infiniband/hw/mlx5/odp.c- Extension
.c- Size
- 57632 bytes
- Lines
- 2109
- Domain
- Driver Families
- Bucket
- drivers/infiniband
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
rdma/ib_umem_odp.hlinux/kernel.hlinux/dma-buf.hlinux/dma-resv.hlinux/hmm.hlinux/hmm-dma.hlinux/pci-p2pdma.hmlx5_ib.hcmd.humr.hqp.hlinux/mlx5/eq.h
Detected Declarations
struct mlx5_pagefaultstruct pf_framestruct prefetch_mr_workfunction populate_ksmfunction populate_mttfunction mlx5_odp_populate_xltfunction free_implicit_child_mr_workfunction destroy_unused_implicit_child_mrfunction mlx5_ib_invalidate_rangefunction internal_fill_odp_capsfunction mlx5_ib_page_fault_resumefunction alloc_implicit_mr_null_mkeyfunction mlx5_ib_free_odp_mrfunction pagefault_real_mrfunction pagefault_implicit_mrfunction pagefault_dmabuf_mrfunction pagefault_mrfunction mlx5_ib_init_odp_mrfunction mlx5_ib_init_dmabuf_mrfunction mkey_is_eqfunction pagefault_single_data_segmentfunction successfullyfunction mlx5_ib_mr_initiator_pfault_handlerfunction mlx5_ib_mr_responder_pfault_handler_srqfunction mlx5_ib_mr_responder_pfault_handler_rqfunction mlx5_ib_mr_wqe_pfault_handlerfunction mlx5_ib_mr_rdma_pfault_handlerfunction mlx5_ib_mr_memory_pfault_handlerfunction mlx5_ib_pfaultfunction mlx5_ib_eqe_pf_actionfunction mlx5_ib_eq_pf_processfunction mlx5_ib_eq_pf_intfunction mempool_refillfunction mlx5_ib_eq_pf_actionfunction mlx5r_odp_create_eqfunction mlx5_ib_odp_destroy_eqfunction mlx5_ib_odp_init_onefunction mlx5_ib_odp_cleanup_onefunction mlx5_ib_odp_initfunction destroy_prefetch_workfunction get_prefetchable_mrfunction mlx5_ib_prefetch_mr_workfunction init_prefetch_workfunction mlx5_ib_prefetch_sg_listfunction mlx5_ib_advise_mr_prefetch
Annotated Snippet
struct mlx5_pagefault {
u32 bytes_committed;
u64 token;
u8 event_subtype;
u8 type;
union {
/* Initiator or send message responder pagefault details. */
struct {
/* Received packet size, only valid for responders. */
u32 packet_size;
/*
* Number of resource holding WQE, depends on type.
*/
u32 wq_num;
/*
* WQE index. Refers to either the send queue or
* receive queue, according to event_subtype.
*/
u16 wqe_index;
} wqe;
/* RDMA responder pagefault details */
struct {
u32 r_key;
/*
* Received packet size, minimal size page fault
* resolution required for forward progress.
*/
u32 packet_size;
u32 rdma_op_len;
u64 rdma_va;
} rdma;
struct {
u64 va;
u32 mkey;
u32 fault_byte_count;
u32 prefetch_before_byte_count;
u32 prefetch_after_byte_count;
u8 flags;
} memory;
};
struct mlx5_ib_pf_eq *eq;
struct work_struct work;
};
#define MAX_PREFETCH_LEN (4*1024*1024U)
/* Timeout in ms to wait for an active mmu notifier to complete when handling
* a pagefault. */
#define MMU_NOTIFIER_TIMEOUT 1000
static u64 mlx5_imr_ksm_entries;
static u64 mlx5_imr_mtt_entries;
static u64 mlx5_imr_mtt_size;
static u8 mlx5_imr_mtt_shift;
static u8 mlx5_imr_ksm_page_shift;
static void populate_ksm(struct mlx5_ksm *pksm, size_t idx, size_t nentries,
struct mlx5_ib_mr *imr, int flags)
{
struct mlx5_core_dev *dev = mr_to_mdev(imr)->mdev;
struct mlx5_ksm *end = pksm + nentries;
u64 step = MLX5_CAP_ODP(dev, mem_page_fault) ? mlx5_imr_mtt_size : 0;
__be32 key = MLX5_CAP_ODP(dev, mem_page_fault) ?
cpu_to_be32(imr->null_mmkey.key) :
mr_to_mdev(imr)->mkeys.null_mkey;
u64 va =
MLX5_CAP_ODP(dev, mem_page_fault) ? idx * mlx5_imr_mtt_size : 0;
if (flags & MLX5_IB_UPD_XLT_ZAP) {
for (; pksm != end; pksm++, idx++, va += step) {
pksm->key = key;
pksm->va = cpu_to_be64(va);
}
return;
}
/*
* The locking here is pretty subtle. Ideally the implicit_children
* xarray would be protected by the umem_mutex, however that is not
* possible. Instead this uses a weaker update-then-lock pattern:
*
* xa_store()
* mutex_lock(umem_mutex)
* mlx5r_umr_update_xlt()
* mutex_unlock(umem_mutex)
* destroy lkey
*
* ie any change the xarray must be followed by the locked update_xlt
* before destroying.
Annotation
- Immediate include surface: `rdma/ib_umem_odp.h`, `linux/kernel.h`, `linux/dma-buf.h`, `linux/dma-resv.h`, `linux/hmm.h`, `linux/hmm-dma.h`, `linux/pci-p2pdma.h`, `mlx5_ib.h`.
- Detected declarations: `struct mlx5_pagefault`, `struct pf_frame`, `struct prefetch_mr_work`, `function populate_ksm`, `function populate_mtt`, `function mlx5_odp_populate_xlt`, `function free_implicit_child_mr_work`, `function destroy_unused_implicit_child_mr`, `function mlx5_ib_invalidate_range`, `function internal_fill_odp_caps`.
- Atlas domain: Driver Families / drivers/infiniband.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.