drivers/infiniband/hw/mlx5/wr.c
Source file repositories/reference/linux-study-clean/drivers/infiniband/hw/mlx5/wr.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/infiniband/hw/mlx5/wr.c- Extension
.c- Size
- 34740 bytes
- Lines
- 1285
- Domain
- Driver Families
- Bucket
- drivers/infiniband
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/gfp.hlinux/mlx5/qp.hlinux/mlx5/driver.hwr.humr.h
Detected Declarations
function mlx5r_wq_overflowfunction set_raddr_segfunction set_eth_segfunction set_datagram_segfunction set_data_ptr_segfunction frwr_mkey_maskfunction sig_mkey_maskfunction set_reg_umr_segfunction set_linv_umr_segfunction get_umr_flagsfunction set_reg_mkey_segfunction set_linv_mkey_segfunction set_reg_data_segfunction send_iethfunction calc_sigfunction wq_sigfunction set_data_inl_segfunction prot_field_sizefunction bs_selectorfunction mlx5_fill_inl_bsffunction mlx5_set_bsffunction set_sig_data_segmentfunction set_sig_mkey_segmentfunction set_sig_umr_segmentfunction set_pi_umr_wrfunction set_psv_wrfunction set_reg_wrfunction mlx5_set_umr_free_mkeyfunction set_linv_wrfunction dump_wqefunction mlx5r_begin_wqefunction begin_wqefunction mlx5r_finish_wqefunction handle_rdma_opfunction handle_local_invfunction handle_reg_mrfunction handle_psvfunction handle_reg_mr_integrityfunction handle_qpt_rcfunction handle_qpt_ucfunction handle_qpt_hw_gsifunction handle_qpt_udfunction mlx5r_ring_dbfunction mlx5_ib_post_sendfunction set_sig_segfunction mlx5_ib_post_recv
Annotated Snippet
if (copysz < left) {
handle_post_send_edge(&qp->sq, seg, *size, cur_edge);
left -= copysz;
pdata += copysz;
mlx5r_memcpy_send_wqe(&qp->sq, cur_edge, seg, size,
pdata, left);
}
return;
}
*seg += sizeof(struct mlx5_wqe_eth_seg);
*size += sizeof(struct mlx5_wqe_eth_seg) / 16;
}
static void set_datagram_seg(struct mlx5_wqe_datagram_seg *dseg,
const struct ib_send_wr *wr)
{
memcpy(&dseg->av, &to_mah(ud_wr(wr)->ah)->av, sizeof(struct mlx5_av));
dseg->av.dqp_dct =
cpu_to_be32(ud_wr(wr)->remote_qpn | MLX5_EXTENDED_UD_AV);
dseg->av.key.qkey.qkey = cpu_to_be32(ud_wr(wr)->remote_qkey);
}
static void set_data_ptr_seg(struct mlx5_wqe_data_seg *dseg, struct ib_sge *sg)
{
dseg->byte_count = cpu_to_be32(sg->length);
dseg->lkey = cpu_to_be32(sg->lkey);
dseg->addr = cpu_to_be64(sg->addr);
}
static __be64 frwr_mkey_mask(bool atomic)
{
u64 result;
result = MLX5_MKEY_MASK_LEN |
MLX5_MKEY_MASK_PAGE_SIZE |
MLX5_MKEY_MASK_START_ADDR |
MLX5_MKEY_MASK_EN_RINVAL |
MLX5_MKEY_MASK_KEY |
MLX5_MKEY_MASK_LR |
MLX5_MKEY_MASK_LW |
MLX5_MKEY_MASK_RR |
MLX5_MKEY_MASK_RW |
MLX5_MKEY_MASK_SMALL_FENCE |
MLX5_MKEY_MASK_FREE;
if (atomic)
result |= MLX5_MKEY_MASK_A;
return cpu_to_be64(result);
}
static __be64 sig_mkey_mask(void)
{
u64 result;
result = MLX5_MKEY_MASK_LEN |
MLX5_MKEY_MASK_PAGE_SIZE |
MLX5_MKEY_MASK_START_ADDR |
MLX5_MKEY_MASK_EN_SIGERR |
MLX5_MKEY_MASK_EN_RINVAL |
MLX5_MKEY_MASK_KEY |
MLX5_MKEY_MASK_LR |
MLX5_MKEY_MASK_LW |
MLX5_MKEY_MASK_RR |
MLX5_MKEY_MASK_RW |
MLX5_MKEY_MASK_SMALL_FENCE |
MLX5_MKEY_MASK_FREE |
MLX5_MKEY_MASK_BSF_EN;
return cpu_to_be64(result);
}
static void set_reg_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr,
struct mlx5_ib_mr *mr, u8 flags, bool atomic)
{
int size = (mr->mmkey.ndescs + mr->meta_ndescs) * mr->desc_size;
memset(umr, 0, sizeof(*umr));
umr->flags = flags;
umr->xlt_octowords = cpu_to_be16(mlx5r_umr_get_xlt_octo(size));
umr->mkey_mask = frwr_mkey_mask(atomic);
}
static void set_linv_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr)
{
memset(umr, 0, sizeof(*umr));
umr->mkey_mask = cpu_to_be64(MLX5_MKEY_MASK_FREE);
Annotation
- Immediate include surface: `linux/gfp.h`, `linux/mlx5/qp.h`, `linux/mlx5/driver.h`, `wr.h`, `umr.h`.
- Detected declarations: `function mlx5r_wq_overflow`, `function set_raddr_seg`, `function set_eth_seg`, `function set_datagram_seg`, `function set_data_ptr_seg`, `function frwr_mkey_mask`, `function sig_mkey_mask`, `function set_reg_umr_seg`, `function set_linv_umr_seg`, `function get_umr_flags`.
- Atlas domain: Driver Families / drivers/infiniband.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.