drivers/input/rmi4/rmi_f12.c
Source file repositories/reference/linux-study-clean/drivers/input/rmi4/rmi_f12.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/input/rmi4/rmi_f12.c- Extension
.c- Size
- 15267 bytes
- Lines
- 575
- Domain
- Driver Families
- Bucket
- drivers/input
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/input.hlinux/input/mt.hlinux/rmi.hrmi_driver.hrmi_2d_sensor.h
Detected Declarations
struct f12_dataenum rmi_f12_object_typefunction rmi_f12_read_sensor_tuningfunction rmi_f12_process_objectsfunction rmi_f12_attentionfunction rmi_f12_write_control_regsfunction rmi_f12_configfunction rmi_f12_probe
Annotated Snippet
struct f12_data {
struct rmi_2d_sensor sensor;
struct rmi_2d_sensor_platform_data sensor_pdata;
bool has_dribble;
u16 data_addr;
struct rmi_register_descriptor query_reg_desc;
struct rmi_register_descriptor control_reg_desc;
struct rmi_register_descriptor data_reg_desc;
/* F12 Data1 describes sensed objects */
const struct rmi_register_desc_item *data1;
u16 data1_offset;
/* F12 Data5 describes finger ACM */
const struct rmi_register_desc_item *data5;
u16 data5_offset;
/* F12 Data5 describes Pen */
const struct rmi_register_desc_item *data6;
u16 data6_offset;
/* F12 Data9 reports relative data */
const struct rmi_register_desc_item *data9;
u16 data9_offset;
const struct rmi_register_desc_item *data15;
u16 data15_offset;
unsigned long *abs_mask;
unsigned long *rel_mask;
};
static int rmi_f12_read_sensor_tuning(struct f12_data *f12)
{
const struct rmi_register_desc_item *item;
struct rmi_2d_sensor *sensor = &f12->sensor;
struct rmi_function *fn = sensor->fn;
struct rmi_device *rmi_dev = fn->rmi_dev;
int ret;
int offset;
u8 buf[15];
int pitch_x = 0;
int pitch_y = 0;
int rx_receivers = 0;
int tx_receivers = 0;
u16 query_dpm_addr = 0;
int dpm_resolution = 0;
item = rmi_get_register_desc_item(&f12->control_reg_desc, 8);
if (!item) {
dev_err(&fn->dev,
"F12 does not have the sensor tuning control register\n");
return -ENODEV;
}
offset = rmi_register_desc_calc_reg_offset(&f12->control_reg_desc, 8);
if (item->reg_size > sizeof(buf)) {
dev_err(&fn->dev,
"F12 control8 should be no bigger than %zd bytes, not: %ld\n",
sizeof(buf), item->reg_size);
return -ENODEV;
}
ret = rmi_read_block(rmi_dev, fn->fd.control_base_addr + offset, buf,
item->reg_size);
if (ret)
return ret;
offset = 0;
if (rmi_register_desc_has_subpacket(item, 0)) {
sensor->max_x = (buf[offset + 1] << 8) | buf[offset];
sensor->max_y = (buf[offset + 3] << 8) | buf[offset + 2];
offset += 4;
}
rmi_dbg(RMI_DEBUG_FN, &fn->dev, "%s: max_x: %d max_y: %d\n", __func__,
sensor->max_x, sensor->max_y);
if (rmi_register_desc_has_subpacket(item, 1)) {
pitch_x = (buf[offset + 1] << 8) | buf[offset];
pitch_y = (buf[offset + 3] << 8) | buf[offset + 2];
offset += 4;
}
if (rmi_register_desc_has_subpacket(item, 2)) {
/* Units 1/128 sensor pitch */
Annotation
- Immediate include surface: `linux/input.h`, `linux/input/mt.h`, `linux/rmi.h`, `rmi_driver.h`, `rmi_2d_sensor.h`.
- Detected declarations: `struct f12_data`, `enum rmi_f12_object_type`, `function rmi_f12_read_sensor_tuning`, `function rmi_f12_process_objects`, `function rmi_f12_attention`, `function rmi_f12_write_control_regs`, `function rmi_f12_config`, `function rmi_f12_probe`.
- Atlas domain: Driver Families / drivers/input.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.