drivers/input/serio/i8042.c
Source file repositories/reference/linux-study-clean/drivers/input/serio/i8042.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/input/serio/i8042.c- Extension
.c- Size
- 38761 bytes
- Lines
- 1665
- Domain
- Driver Families
- Bucket
- drivers/input
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/types.hlinux/delay.hlinux/export.hlinux/module.hlinux/interrupt.hlinux/ioport.hlinux/init.hlinux/serio.hlinux/err.hlinux/rcupdate.hlinux/platform_device.hlinux/i8042.hlinux/slab.hlinux/suspend.hlinux/property.hasm/io.hi8042.h
Detected Declarations
struct i8042_portenum i8042_controller_reset_modefunction i8042_set_resetfunction i8042_lock_chipfunction i8042_unlock_chipfunction i8042_install_filterfunction i8042_remove_filterfunction i8042_wait_readfunction i8042_wait_writefunction i8042_flushfunction i8042_commandfunction i8042_commandfunction i8042_kbd_writefunction i8042_aux_writefunction i8042_port_closefunction i8042_startfunction i8042_stopfunction scoped_guardfunction i8042_filterfunction i8042_handle_muxfunction i8042_handle_datafunction scoped_guardfunction i8042_interruptfunction i8042_enable_kbd_portfunction AUXfunction i8042_enable_mux_portsfunction Multiplexedfunction i8042_check_muxfunction i8042_aux_test_irqfunction i8042_toggle_auxfunction i8042_check_auxfunction keyboardfunction scoped_guardfunction i8042_controller_checkfunction i8042_controller_selftestfunction i8042_controller_initfunction scoped_guardfunction i8042_controller_resetfunction i8042_panic_blinkfunction i8042_dritek_enablefunction i8042_controller_resumefunction i8042_pm_suspendfunction i8042_pm_resume_noirqfunction i8042_pm_resumefunction i8042_pm_thawfunction i8042_pm_resetfunction i8042_pm_restorefunction i8042_shutdown
Annotated Snippet
module_init(i8042_init);
module_exit(i8042_exit);
Annotation
- Immediate include surface: `linux/types.h`, `linux/delay.h`, `linux/export.h`, `linux/module.h`, `linux/interrupt.h`, `linux/ioport.h`, `linux/init.h`, `linux/serio.h`.
- Detected declarations: `struct i8042_port`, `enum i8042_controller_reset_mode`, `function i8042_set_reset`, `function i8042_lock_chip`, `function i8042_unlock_chip`, `function i8042_install_filter`, `function i8042_remove_filter`, `function i8042_wait_read`, `function i8042_wait_write`, `function i8042_flush`.
- Atlas domain: Driver Families / drivers/input.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.