drivers/interconnect/qcom/msm8939.c
Source file repositories/reference/linux-study-clean/drivers/interconnect/qcom/msm8939.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/interconnect/qcom/msm8939.c- Extension
.c- Size
- 32196 bytes
- Lines
- 1435
- Domain
- Driver Families
- Bucket
- drivers/interconnect
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/device.hlinux/interconnect-provider.hlinux/io.hlinux/module.hlinux/mod_devicetable.hlinux/platform_device.hlinux/regmap.hdt-bindings/interconnect/qcom,msm8939.hicc-rpm.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2020 Linaro Ltd
* Author: Jun Nie <jun.nie@linaro.org>
* With reference of msm8916 interconnect driver of Georgi Djakov.
*/
#include <linux/device.h>
#include <linux/interconnect-provider.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <dt-bindings/interconnect/qcom,msm8939.h>
#include "icc-rpm.h"
enum {
MSM8939_BIMC_SNOC_MAS = 1,
MSM8939_BIMC_SNOC_SLV,
MSM8939_MASTER_AMPSS_M0,
MSM8939_MASTER_LPASS,
MSM8939_MASTER_BLSP_1,
MSM8939_MASTER_DEHR,
MSM8939_MASTER_GRAPHICS_3D,
MSM8939_MASTER_JPEG,
MSM8939_MASTER_MDP_PORT0,
MSM8939_MASTER_MDP_PORT1,
MSM8939_MASTER_CPP,
MSM8939_MASTER_CRYPTO_CORE0,
MSM8939_MASTER_SDCC_1,
MSM8939_MASTER_SDCC_2,
MSM8939_MASTER_QDSS_BAM,
MSM8939_MASTER_QDSS_ETR,
MSM8939_MASTER_SNOC_CFG,
MSM8939_MASTER_SPDM,
MSM8939_MASTER_TCU0,
MSM8939_MASTER_USB_HS1,
MSM8939_MASTER_USB_HS2,
MSM8939_MASTER_VFE,
MSM8939_MASTER_VIDEO_P0,
MSM8939_SNOC_MM_INT_0,
MSM8939_SNOC_MM_INT_1,
MSM8939_SNOC_MM_INT_2,
MSM8939_PNOC_INT_0,
MSM8939_PNOC_INT_1,
MSM8939_PNOC_MAS_0,
MSM8939_PNOC_MAS_1,
MSM8939_PNOC_SLV_0,
MSM8939_PNOC_SLV_1,
MSM8939_PNOC_SLV_2,
MSM8939_PNOC_SLV_3,
MSM8939_PNOC_SLV_4,
MSM8939_PNOC_SLV_8,
MSM8939_PNOC_SLV_9,
MSM8939_PNOC_SNOC_MAS,
MSM8939_PNOC_SNOC_SLV,
MSM8939_SNOC_QDSS_INT,
MSM8939_SLAVE_AMPSS_L2,
MSM8939_SLAVE_APSS,
MSM8939_SLAVE_LPASS,
MSM8939_SLAVE_BIMC_CFG,
MSM8939_SLAVE_BLSP_1,
MSM8939_SLAVE_BOOT_ROM,
MSM8939_SLAVE_CAMERA_CFG,
MSM8939_SLAVE_CATS_128,
MSM8939_SLAVE_OCMEM_64,
MSM8939_SLAVE_CLK_CTL,
MSM8939_SLAVE_CRYPTO_0_CFG,
MSM8939_SLAVE_DEHR_CFG,
MSM8939_SLAVE_DISPLAY_CFG,
MSM8939_SLAVE_EBI_CH0,
MSM8939_SLAVE_GRAPHICS_3D_CFG,
MSM8939_SLAVE_IMEM_CFG,
MSM8939_SLAVE_IMEM,
MSM8939_SLAVE_MPM,
MSM8939_SLAVE_MSG_RAM,
MSM8939_SLAVE_MSS,
MSM8939_SLAVE_PDM,
MSM8939_SLAVE_PMIC_ARB,
MSM8939_SLAVE_PNOC_CFG,
MSM8939_SLAVE_PRNG,
MSM8939_SLAVE_QDSS_CFG,
MSM8939_SLAVE_QDSS_STM,
MSM8939_SLAVE_RBCPR_CFG,
MSM8939_SLAVE_SDCC_1,
MSM8939_SLAVE_SDCC_2,
MSM8939_SLAVE_SECURITY,
Annotation
- Immediate include surface: `linux/device.h`, `linux/interconnect-provider.h`, `linux/io.h`, `linux/module.h`, `linux/mod_devicetable.h`, `linux/platform_device.h`, `linux/regmap.h`, `dt-bindings/interconnect/qcom,msm8939.h`.
- Atlas domain: Driver Families / drivers/interconnect.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.