drivers/iommu/amd/amd_iommu_types.h
Source file repositories/reference/linux-study-clean/drivers/iommu/amd/amd_iommu_types.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/iommu/amd/amd_iommu_types.h- Extension
.h- Size
- 29495 bytes
- Lines
- 1062
- Domain
- Driver Families
- Bucket
- drivers/iommu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/iommu.hlinux/types.hlinux/mmu_notifier.hlinux/mutex.hlinux/msi.hlinux/list.hlinux/sizes.hlinux/spinlock.hlinux/pci.hlinux/iommufd.hlinux/irqreturn.hlinux/generic_pt/iommu.huapi/linux/iommufd.h
Detected Declarations
struct irq_remap_tablestruct amd_iommustruct iommu_domainstruct irq_domainstruct amd_irte_opsstruct gcr3_tbl_infostruct pdom_dev_datastruct pdom_iommu_infostruct amd_iommu_viommustruct guest_domain_mapping_infostruct nested_domainstruct protection_domainstruct amd_iommu_pci_segstruct amd_iommustruct acpihid_map_entrystruct devid_mapstruct iommu_dev_datastruct dev_table_entrystruct iommu_cmdstruct ivhd_dte_flagsstruct unity_map_entrystruct irte_gastruct irq_2_irtestruct amd_ir_datastruct amd_irte_opsenum protection_domain_modeenum amd_iommu_intr_mode_typefunction get_ioapic_devidfunction list_for_each_entryfunction get_hpet_devidfunction list_for_each_entry
Annotated Snippet
struct irq_remap_table {
raw_spinlock_t lock;
unsigned min_index;
u32 *table;
};
/* Interrupt remapping feature used? */
extern bool amd_iommu_irq_remap;
extern const struct iommu_ops amd_iommu_ops;
/* IVRS indicates that pre-boot remapping was enabled */
extern bool amdr_ivrs_remap_support;
#define PCI_SBDF_TO_SEGID(sbdf) (((sbdf) >> 16) & 0xffff)
#define PCI_SBDF_TO_DEVID(sbdf) ((sbdf) & 0xffff)
#define PCI_SEG_DEVID_TO_SBDF(seg, devid) ((((u32)(seg) & 0xffff) << 16) | \
((devid) & 0xffff))
/* Make iterating over all pci segment easier */
#define for_each_pci_segment(pci_seg) \
list_for_each_entry((pci_seg), &amd_iommu_pci_seg_list, list)
#define for_each_pci_segment_safe(pci_seg, next) \
list_for_each_entry_safe((pci_seg), (next), &amd_iommu_pci_seg_list, list)
/*
* Make iterating over all IOMMUs easier
*/
#define for_each_iommu(iommu) \
list_for_each_entry((iommu), &amd_iommu_list, list)
#define for_each_iommu_safe(iommu, next) \
list_for_each_entry_safe((iommu), (next), &amd_iommu_list, list)
/* Making iterating over protection_domain->dev_data_list easier */
#define for_each_pdom_dev_data(pdom_dev_data, pdom) \
list_for_each_entry(pdom_dev_data, &pdom->dev_data_list, list)
#define for_each_pdom_dev_data_safe(pdom_dev_data, next, pdom) \
list_for_each_entry_safe((pdom_dev_data), (next), &pdom->dev_data_list, list)
#define for_each_ivhd_dte_flags(entry) \
list_for_each_entry((entry), &amd_ivhd_dev_flags_list, list)
struct amd_iommu;
struct iommu_domain;
struct irq_domain;
struct amd_irte_ops;
#define AMD_IOMMU_FLAG_TRANS_PRE_ENABLED (1 << 0)
struct gcr3_tbl_info {
u64 *gcr3_tbl; /* Guest CR3 table */
int glx; /* Number of levels for GCR3 table */
u32 pasid_cnt; /* Track attached PASIDs */
u16 domid; /* Per device domain ID */
};
enum protection_domain_mode {
PD_MODE_NONE,
PD_MODE_V1,
PD_MODE_V2,
};
/* Track dev_data/PASID list for the protection domain */
struct pdom_dev_data {
/* Points to attached device data */
struct iommu_dev_data *dev_data;
/* PASID attached to the protection domain */
ioasid_t pasid;
/* For protection_domain->dev_data_list */
struct list_head list;
};
/* Keeps track of the IOMMUs attached to protection domain */
struct pdom_iommu_info {
struct amd_iommu *iommu; /* IOMMUs attach to protection domain */
u32 refcnt; /* Count of attached dev/pasid per domain/IOMMU */
};
struct amd_iommu_viommu {
struct iommufd_viommu core;
struct protection_domain *parent; /* nest parent domain for this viommu */
struct list_head pdom_list; /* For protection_domain->viommu_list */
/*
* Per-vIOMMU guest domain ID to host domain ID mapping.
* Indexed by guest domain ID.
*/
struct xarray gdomid_array;
};
/*
* Contains guest domain ID mapping info,
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/iommu.h`, `linux/types.h`, `linux/mmu_notifier.h`, `linux/mutex.h`, `linux/msi.h`, `linux/list.h`, `linux/sizes.h`.
- Detected declarations: `struct irq_remap_table`, `struct amd_iommu`, `struct iommu_domain`, `struct irq_domain`, `struct amd_irte_ops`, `struct gcr3_tbl_info`, `struct pdom_dev_data`, `struct pdom_iommu_info`, `struct amd_iommu_viommu`, `struct guest_domain_mapping_info`.
- Atlas domain: Driver Families / drivers/iommu.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.