drivers/iommu/arm/arm-smmu/arm-smmu.h

File Facts

System

Linux kernel

Corpus path

drivers/iommu/arm/arm-smmu/arm-smmu.h

Extension

.h

Size

16885 bytes

Lines

565

Domain

Driver Families

Bucket

drivers/iommu

Inferred role

Driver Families: exported/initcall integration point

Status

integration implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
• Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
• Touches IRQ or DMA behavior; this matters for the representative real-device path.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• linux/atomic.h
• linux/bitfield.h
• linux/bits.h
• linux/clk.h
• linux/device.h
• linux/io-64-nonatomic-hi-lo.h
• linux/io-pgtable.h
• linux/iommu.h
• linux/irqreturn.h
• linux/mutex.h
• linux/spinlock.h
• linux/types.h

Detected Declarations

• struct arm_smmu_s2cr
• struct arm_smmu_smr
• struct arm_smmu_device
• struct arm_smmu_cfg
• struct arm_smmu_cb
• struct arm_smmu_domain
• struct arm_smmu_master_cfg
• struct arm_smmu_impl
• struct arm_smmu_context_fault_info
• enum arm_smmu_s2cr_privcfg
• enum arm_smmu_s2cr_type
• enum arm_smmu_cbar_type
• enum arm_smmu_arch_version
• enum arm_smmu_implementation
• enum arm_smmu_context_fmt
• enum arm_smmu_domain_stage
• function arm_smmu_lpae_tcr
• function arm_smmu_lpae_tcr2
• function arm_smmu_lpae_vtcr
• function __arm_smmu_alloc_bitmap
• function arm_smmu_readl
• function arm_smmu_writel
• function arm_smmu_readq
• function arm_smmu_writeq

Annotated Snippet

struct arm_smmu_s2cr {
	struct iommu_group		*group;
	int				count;
	enum arm_smmu_s2cr_type		type;
	enum arm_smmu_s2cr_privcfg	privcfg;
	u8				cbndx;
};

struct arm_smmu_smr {
	u16				mask;
	u16				id;
	bool				valid;
	bool				pinned;
};

struct arm_smmu_device {
	struct device			*dev;

	void __iomem			*base;
	phys_addr_t			ioaddr;
	unsigned int			numpage;
	unsigned int			pgshift;

#define ARM_SMMU_FEAT_COHERENT_WALK	(1 << 0)
#define ARM_SMMU_FEAT_STREAM_MATCH	(1 << 1)
#define ARM_SMMU_FEAT_TRANS_S1		(1 << 2)
#define ARM_SMMU_FEAT_TRANS_S2		(1 << 3)
#define ARM_SMMU_FEAT_TRANS_NESTED	(1 << 4)
#define ARM_SMMU_FEAT_TRANS_OPS		(1 << 5)
#define ARM_SMMU_FEAT_VMID16		(1 << 6)
#define ARM_SMMU_FEAT_FMT_AARCH64_4K	(1 << 7)
#define ARM_SMMU_FEAT_FMT_AARCH64_16K	(1 << 8)
#define ARM_SMMU_FEAT_FMT_AARCH64_64K	(1 << 9)
#define ARM_SMMU_FEAT_FMT_AARCH32_L	(1 << 10)
#define ARM_SMMU_FEAT_FMT_AARCH32_S	(1 << 11)
#define ARM_SMMU_FEAT_EXIDS		(1 << 12)
	u32				features;

	enum arm_smmu_arch_version	version;
	enum arm_smmu_implementation	model;
	const struct arm_smmu_impl	*impl;

	u32				num_context_banks;
	u32				num_s2_context_banks;
	DECLARE_BITMAP(context_map, ARM_SMMU_MAX_CBS);
	struct arm_smmu_cb		*cbs;
	atomic_t			irptndx;

	u32				num_mapping_groups;
	u16				streamid_mask;
	u16				smr_mask_mask;
	struct arm_smmu_smr		*smrs;
	struct arm_smmu_s2cr		*s2crs;
	struct mutex			stream_map_mutex;

	unsigned long			va_size;
	unsigned long			ipa_size;
	unsigned long			pa_size;
	unsigned long			pgsize_bitmap;

	int				num_context_irqs;
	int				num_clks;
	unsigned int			*irqs;
	struct clk_bulk_data		*clks;

	spinlock_t			global_sync_lock;

	/* IOMMU core code handle */
	struct iommu_device		iommu;
};

enum arm_smmu_context_fmt {
	ARM_SMMU_CTX_FMT_NONE,
	ARM_SMMU_CTX_FMT_AARCH64,
	ARM_SMMU_CTX_FMT_AARCH32_L,
	ARM_SMMU_CTX_FMT_AARCH32_S,
};

struct arm_smmu_cfg {
	u8				cbndx;
	u8				irptndx;
	union {
		u16			asid;
		u16			vmid;
	};
	enum arm_smmu_cbar_type		cbar;
	enum arm_smmu_context_fmt	fmt;
	bool				flush_walk_prefer_tlbiasid;
};
#define ARM_SMMU_INVALID_IRPTNDX	0xff

Annotation

• Immediate include surface: `linux/atomic.h`, `linux/bitfield.h`, `linux/bits.h`, `linux/clk.h`, `linux/device.h`, `linux/io-64-nonatomic-hi-lo.h`, `linux/io-pgtable.h`, `linux/iommu.h`.
• Detected declarations: `struct arm_smmu_s2cr`, `struct arm_smmu_smr`, `struct arm_smmu_device`, `struct arm_smmu_cfg`, `struct arm_smmu_cb`, `struct arm_smmu_domain`, `struct arm_smmu_master_cfg`, `struct arm_smmu_impl`, `struct arm_smmu_context_fault_info`, `enum arm_smmu_s2cr_privcfg`.
• Atlas domain: Driver Families / drivers/iommu.
• Implementation status: integration implementation candidate.
• Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
• IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.