drivers/iommu/arm/arm-smmu/qcom_iommu.c
Source file repositories/reference/linux-study-clean/drivers/iommu/arm/arm-smmu/qcom_iommu.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/iommu/arm/arm-smmu/qcom_iommu.c- Extension
.c- Size
- 24320 bytes
- Lines
- 945
- Domain
- Driver Families
- Bucket
- drivers/iommu
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/atomic.hlinux/bitfield.hlinux/clk.hlinux/delay.hlinux/dma-mapping.hlinux/err.hlinux/interrupt.hlinux/io.hlinux/io-64-nonatomic-hi-lo.hlinux/io-pgtable.hlinux/iommu.hlinux/iopoll.hlinux/kconfig.hlinux/init.hlinux/mutex.hlinux/of.hlinux/of_platform.hlinux/platform_device.hlinux/pm.hlinux/pm_runtime.hlinux/firmware/qcom/qcom_scm.hlinux/slab.hlinux/spinlock.harm-smmu.h
Detected Declarations
struct qcom_iommu_ctxstruct qcom_iommu_devstruct qcom_iommu_ctxstruct qcom_iommu_domainenum qcom_iommu_clkfunction to_ctxfunction iommu_writelfunction iommu_writeqfunction iommu_readlfunction iommu_readqfunction qcom_iommu_tlb_syncfunction qcom_iommu_tlb_inv_contextfunction qcom_iommu_tlb_inv_range_nosyncfunction qcom_iommu_tlb_flush_walkfunction qcom_iommu_tlb_add_pagefunction qcom_iommu_faultfunction qcom_iommu_init_domainfunction qcom_iommu_domain_freefunction qcom_iommu_attach_devfunction qcom_iommu_identity_attachfunction qcom_iommu_mapfunction qcom_iommu_unmapfunction qcom_iommu_flush_iotlb_allfunction qcom_iommu_iotlb_syncfunction qcom_iommu_iova_to_physfunction qcom_iommu_capablefunction qcom_iommu_of_xlatefunction qcom_iommu_sec_ptbl_initfunction get_asidfunction qcom_iommu_ctx_probefunction qcom_iommu_ctx_removefunction qcom_iommu_has_secure_contextfunction qcom_iommu_device_probefunction qcom_iommu_device_removefunction qcom_iommu_resumefunction qcom_iommu_suspendfunction qcom_iommu_initmodule init qcom_iommu_init
Annotated Snippet
device_initcall(qcom_iommu_init);
Annotation
- Immediate include surface: `linux/atomic.h`, `linux/bitfield.h`, `linux/clk.h`, `linux/delay.h`, `linux/dma-mapping.h`, `linux/err.h`, `linux/interrupt.h`, `linux/io.h`.
- Detected declarations: `struct qcom_iommu_ctx`, `struct qcom_iommu_dev`, `struct qcom_iommu_ctx`, `struct qcom_iommu_domain`, `enum qcom_iommu_clk`, `function to_ctx`, `function iommu_writel`, `function iommu_writeq`, `function iommu_readl`, `function iommu_readq`.
- Atlas domain: Driver Families / drivers/iommu.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.