drivers/iommu/fsl_pamu_domain.h

File Facts

System

Linux kernel

Corpus path

drivers/iommu/fsl_pamu_domain.h

Extension

.h

Size

615 bytes

Lines

28

Domain

Driver Families

Bucket

drivers/iommu

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• fsl_pamu.h

Detected Declarations

• struct fsl_dma_domain
• struct device_domain_info

Annotated Snippet

struct fsl_dma_domain {
	/* list of devices associated with the domain */
	struct list_head		devices;
	u32				stash_id;
	struct iommu_domain		iommu_domain;
	spinlock_t			domain_lock;
};

/* domain-device relationship */
struct device_domain_info {
	struct list_head link;	/* link to domain siblings */
	struct device *dev;
	u32 liodn;
	struct fsl_dma_domain *domain; /* pointer to domain */
};
#endif  /* __FSL_PAMU_DOMAIN_H */

Annotation

• Immediate include surface: `fsl_pamu.h`.
• Detected declarations: `struct fsl_dma_domain`, `struct device_domain_info`.
• Atlas domain: Driver Families / drivers/iommu.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.