drivers/iommu/generic_pt/fmt/amdv1.h
Source file repositories/reference/linux-study-clean/drivers/iommu/generic_pt/fmt/amdv1.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/iommu/generic_pt/fmt/amdv1.h- Extension
.h- Size
- 12146 bytes
- Lines
- 414
- Domain
- Driver Families
- Bucket
- drivers/iommu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
defs_amdv1.h../pt_defs.hasm/page.hlinux/bitfield.hlinux/container_of.hlinux/mem_encrypt.hlinux/minmax.hlinux/sizes.hlinux/string.hlinux/generic_pt/iommu.hlinux/iommu.h
Detected Declarations
function FIELD_GETfunction amdv1pt_entry_oafunction amdv1pt_can_have_leaffunction amdv1pt_entry_num_contig_lg2function amdv1pt_num_items_lg2function amdv1pt_possible_sizesfunction amdv1pt_load_entry_rawfunction amdv1pt_install_leaf_entryfunction amdv1pt_install_tablefunction amdv1pt_attr_from_entryfunction amdv1pt_clear_entriesfunction amdv1pt_entry_is_write_dirtyfunction amdv1pt_entry_make_write_cleanfunction amdv1pt_entry_make_write_dirtyfunction amdv1pt_iommu_set_protfunction amdv1pt_iommu_fmt_initfunction amdv1pt_iommu_fmt_hw_info
Annotated Snippet
if (num_contig_lg2 <= ilog2(32)) {
for (; tablep != end; tablep++)
WRITE_ONCE(*tablep, entry);
} else {
memset64(tablep, entry, log2_to_int(num_contig_lg2));
}
}
pts->entry = entry;
}
#define pt_install_leaf_entry amdv1pt_install_leaf_entry
static inline bool amdv1pt_install_table(struct pt_state *pts,
pt_oaddr_t table_pa,
const struct pt_write_attrs *attrs)
{
u64 entry;
/*
* IR and IW are ANDed from the table levels along with the PTE. We
* always control permissions from the PTE, so always set IR and IW for
* tables.
*/
entry = AMDV1PT_FMT_PR |
FIELD_PREP(AMDV1PT_FMT_NEXT_LEVEL, pts->level) |
FIELD_PREP(AMDV1PT_FMT_OA,
log2_div(table_pa, PT_GRANULE_LG2SZ)) |
AMDV1PT_FMT_IR | AMDV1PT_FMT_IW;
if (pts_feature(pts, PT_FEAT_AMDV1_ENCRYPT_TABLES))
entry = __sme_set(entry);
return pt_table_install64(pts, entry);
}
#define pt_install_table amdv1pt_install_table
static inline void amdv1pt_attr_from_entry(const struct pt_state *pts,
struct pt_write_attrs *attrs)
{
attrs->descriptor_bits =
pts->entry & (AMDV1PT_FMT_FC | AMDV1PT_FMT_IR | AMDV1PT_FMT_IW);
}
#define pt_attr_from_entry amdv1pt_attr_from_entry
static inline void amdv1pt_clear_entries(struct pt_state *pts,
unsigned int num_contig_lg2)
{
u64 *tablep = pt_cur_table(pts, u64) + pts->index;
u64 *end = tablep + log2_to_int(num_contig_lg2);
/*
* gcc generates rep stos for the io-pgtable code, and this difference
* can show in microbenchmarks with larger contiguous page sizes.
* rep is slower for small cases.
*/
if (num_contig_lg2 <= ilog2(32)) {
for (; tablep != end; tablep++)
WRITE_ONCE(*tablep, 0);
} else {
memset64(tablep, 0, log2_to_int(num_contig_lg2));
}
}
#define pt_clear_entries amdv1pt_clear_entries
static inline bool amdv1pt_entry_is_write_dirty(const struct pt_state *pts)
{
unsigned int num_contig_lg2 = amdv1pt_entry_num_contig_lg2(pts);
u64 *tablep = pt_cur_table(pts, u64) +
log2_set_mod(pts->index, 0, num_contig_lg2);
u64 *end = tablep + log2_to_int(num_contig_lg2);
for (; tablep != end; tablep++)
if (READ_ONCE(*tablep) & AMDV1PT_FMT_D)
return true;
return false;
}
#define pt_entry_is_write_dirty amdv1pt_entry_is_write_dirty
static inline void amdv1pt_entry_make_write_clean(struct pt_state *pts)
{
unsigned int num_contig_lg2 = amdv1pt_entry_num_contig_lg2(pts);
u64 *tablep = pt_cur_table(pts, u64) +
log2_set_mod(pts->index, 0, num_contig_lg2);
u64 *end = tablep + log2_to_int(num_contig_lg2);
for (; tablep != end; tablep++)
WRITE_ONCE(*tablep, READ_ONCE(*tablep) & ~(u64)AMDV1PT_FMT_D);
}
#define pt_entry_make_write_clean amdv1pt_entry_make_write_clean
static inline bool amdv1pt_entry_make_write_dirty(struct pt_state *pts)
{
u64 *tablep = pt_cur_table(pts, u64) + pts->index;
Annotation
- Immediate include surface: `defs_amdv1.h`, `../pt_defs.h`, `asm/page.h`, `linux/bitfield.h`, `linux/container_of.h`, `linux/mem_encrypt.h`, `linux/minmax.h`, `linux/sizes.h`.
- Detected declarations: `function FIELD_GET`, `function amdv1pt_entry_oa`, `function amdv1pt_can_have_leaf`, `function amdv1pt_entry_num_contig_lg2`, `function amdv1pt_num_items_lg2`, `function amdv1pt_possible_sizes`, `function amdv1pt_load_entry_raw`, `function amdv1pt_install_leaf_entry`, `function amdv1pt_install_table`, `function amdv1pt_attr_from_entry`.
- Atlas domain: Driver Families / drivers/iommu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.