drivers/iommu/generic_pt/fmt/x86_64.h

Source file repositories/reference/linux-study-clean/drivers/iommu/generic_pt/fmt/x86_64.h

File Facts

System
Linux kernel
Corpus path
drivers/iommu/generic_pt/fmt/x86_64.h
Extension
.h
Size
7900 bytes
Lines
281
Domain
Driver Families
Bucket
drivers/iommu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef __GENERIC_PT_FMT_X86_64_H
#define __GENERIC_PT_FMT_X86_64_H

#include "defs_x86_64.h"
#include "../pt_defs.h"

#include <linux/bitfield.h>
#include <linux/container_of.h>
#include <linux/log2.h>
#include <linux/mem_encrypt.h>

enum {
	PT_MAX_OUTPUT_ADDRESS_LG2 = 52,
	PT_MAX_VA_ADDRESS_LG2 = 57,
	PT_ITEM_WORD_SIZE = sizeof(u64),
	PT_MAX_TOP_LEVEL = 4,
	PT_GRANULE_LG2SZ = 12,
	PT_TABLEMEM_LG2SZ = 12,

	/*
	 * For AMD the GCR3 Base only has these bits. For VT-d FSPTPTR is 4k
	 * aligned and is limited by the architected HAW
	 */
	PT_TOP_PHYS_MASK = GENMASK_ULL(51, 12),
};

/* Shared descriptor bits */
enum {
	X86_64_FMT_P = BIT(0),
	X86_64_FMT_RW = BIT(1),
	X86_64_FMT_U = BIT(2),
	X86_64_FMT_A = BIT(5),
	X86_64_FMT_D = BIT(6),
	X86_64_FMT_OA = GENMASK_ULL(51, 12),
	X86_64_FMT_XD = BIT_ULL(63),
};

/* PDPTE/PDE */
enum {
	X86_64_FMT_PS = BIT(7),
};

static inline pt_oaddr_t x86_64_pt_table_pa(const struct pt_state *pts)
{
	u64 entry = pts->entry;

	if (pts_feature(pts, PT_FEAT_X86_64_AMD_ENCRYPT_TABLES))
		entry = __sme_clr(entry);
	return oalog2_mul(FIELD_GET(X86_64_FMT_OA, entry),
			  PT_TABLEMEM_LG2SZ);
}
#define pt_table_pa x86_64_pt_table_pa

static inline pt_oaddr_t x86_64_pt_entry_oa(const struct pt_state *pts)
{
	u64 entry = pts->entry;

	if (pts_feature(pts, PT_FEAT_X86_64_AMD_ENCRYPT_TABLES))
		entry = __sme_clr(entry);
	return oalog2_mul(FIELD_GET(X86_64_FMT_OA, entry),
			  PT_GRANULE_LG2SZ);
}
#define pt_entry_oa x86_64_pt_entry_oa

static inline bool x86_64_pt_can_have_leaf(const struct pt_state *pts)
{
	return pts->level <= 2;
}
#define pt_can_have_leaf x86_64_pt_can_have_leaf

static inline unsigned int x86_64_pt_num_items_lg2(const struct pt_state *pts)
{
	return PT_TABLEMEM_LG2SZ - ilog2(sizeof(u64));
}
#define pt_num_items_lg2 x86_64_pt_num_items_lg2

static inline enum pt_entry_type x86_64_pt_load_entry_raw(struct pt_state *pts)
{
	const u64 *tablep = pt_cur_table(pts, u64);
	u64 entry;

	pts->entry = entry = READ_ONCE(tablep[pts->index]);
	if (!(entry & X86_64_FMT_P))
		return PT_ENTRY_EMPTY;
	if (pts->level == 0 ||
	    (x86_64_pt_can_have_leaf(pts) && (entry & X86_64_FMT_PS)))
		return PT_ENTRY_OA;
	return PT_ENTRY_TABLE;
}
#define pt_load_entry_raw x86_64_pt_load_entry_raw

Annotation

Implementation Notes