drivers/iommu/generic_pt/iommu_pt.h
Source file repositories/reference/linux-study-clean/drivers/iommu/generic_pt/iommu_pt.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/iommu/generic_pt/iommu_pt.h- Extension
.h- Size
- 39929 bytes
- Lines
- 1370
- Domain
- Driver Families
- Bucket
- drivers/iommu
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
pt_iter.hlinux/export.hlinux/iommu.h../iommu-pages.hlinux/cleanup.hlinux/dma-mapping.h
Detected Declarations
struct iommupt_pending_gatherstruct pt_iommu_dirty_argsstruct pt_iommu_collect_argsstruct pt_iommu_map_argsstruct pt_unmap_argsenum alloc_modefunction flush_writes_rangefunction flush_writes_itemfunction gather_add_tablefunction gather_add_leaffunction gather_range_pendingfunction make_range_ulfunction make_range_u64function compute_best_pgsizefunction __do_iova_to_physfunction iova_to_physfunction record_dirtyfunction __read_and_clear_dirtyfunction for_each_pt_level_entryfunction read_and_clear_dirtyfunction __set_dirtyfunction NSfunction __collect_tablesfunction for_each_pt_level_entryfunction pt_iommu_new_tablefunction clear_contigfunction __map_range_leaffunction __map_rangefunction __do_map_single_pagefunction increase_topfunction check_map_rangefunction do_mapfunction __map_single_pagefunction NSfunction likelyfunction __unmap_rangefunction NSfunction NSfunction NSfunction pt_init_commonfunction pt_iommu_init_domainfunction pt_iommu_zerofunction pt_iommu_initfunction pt_iommu_hw_info
Annotated Snippet
struct iommupt_pending_gather {
struct iommu_iotlb_gather *iotlb_gather;
struct iommu_pages_list free_list;
u8 leaf_levels_bitmap;
u8 table_levels_bitmap;
};
static void gather_add_table(struct iommupt_pending_gather *pending,
const struct pt_state *pts,
struct pt_table_p *table)
{
iommu_pages_list_add(&pending->free_list, table);
if (pts_feature(pts, PT_FEAT_DETAILED_GATHER))
pending->table_levels_bitmap |= BIT(pts->level);
}
static void gather_add_leaf(struct iommupt_pending_gather *pending,
const struct pt_state *pts)
{
if (!pts_feature(pts, PT_FEAT_DETAILED_GATHER))
return;
pending->leaf_levels_bitmap |= BIT(pts->level);
}
static void gather_range_pending(struct iommupt_pending_gather *pending,
struct pt_iommu *iommu_table, pt_vaddr_t iova,
pt_vaddr_t len)
{
struct iommu_iotlb_gather *iotlb_gather = pending->iotlb_gather;
struct pt_common *common = common_from_iommu(iommu_table);
if (pt_feature(common, PT_FEAT_DMA_INCOHERENT))
iommu_pages_stop_incoherent_list(&pending->free_list,
iommu_table->iommu_device);
/*
* If running in DMA-FQ mode then the unmap will be followed by an IOTLB
* flush all so we need to optimize by never flushing the IOTLB here.
*
* For NO_GAPS the user gets to pick if flushing all or doing micro
* flushes is better for their work load by choosing DMA vs DMA-FQ
* operation. Drivers should also see shadow_on_flush.
*/
if (!iommu_iotlb_gather_queued(iotlb_gather)) {
if (pt_feature(common, PT_FEAT_FLUSH_RANGE_NO_GAPS) &&
iommu_iotlb_gather_is_disjoint(iotlb_gather, iova, len)) {
iommu_iotlb_sync(&iommu_table->domain, iotlb_gather);
/*
* Note that the sync frees the gather's free list, so
* we must not have any pages on that list that are
* covered by iova/len
*/
}
iommu_iotlb_gather_add_range(iotlb_gather, iova, len);
}
iommu_pages_list_splice(&pending->free_list, &iotlb_gather->freelist);
INIT_LIST_HEAD(&pending->free_list.pages);
if (pt_feature(common, PT_FEAT_DETAILED_GATHER)) {
iotlb_gather->pt.leaf_levels_bitmap |=
pending->leaf_levels_bitmap;
iotlb_gather->pt.table_levels_bitmap |=
pending->table_levels_bitmap;
pending->leaf_levels_bitmap = 0;
pending->table_levels_bitmap = 0;
}
}
#define DOMAIN_NS(op) CONCATENATE(CONCATENATE(pt_iommu_, PTPFX), op)
static int make_range_ul(struct pt_common *common, struct pt_range *range,
unsigned long iova, unsigned long len)
{
unsigned long last;
if (unlikely(len == 0))
return -EINVAL;
if (check_add_overflow(iova, len - 1, &last))
return -EOVERFLOW;
*range = pt_make_range(common, iova, last);
if (sizeof(iova) > sizeof(range->va)) {
if (unlikely(range->va != iova || range->last_va != last))
return -EOVERFLOW;
}
return 0;
}
Annotation
- Immediate include surface: `pt_iter.h`, `linux/export.h`, `linux/iommu.h`, `../iommu-pages.h`, `linux/cleanup.h`, `linux/dma-mapping.h`.
- Detected declarations: `struct iommupt_pending_gather`, `struct pt_iommu_dirty_args`, `struct pt_iommu_collect_args`, `struct pt_iommu_map_args`, `struct pt_unmap_args`, `enum alloc_mode`, `function flush_writes_range`, `function flush_writes_item`, `function gather_add_table`, `function gather_add_leaf`.
- Atlas domain: Driver Families / drivers/iommu.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.