drivers/iommu/msm_iommu.c
Source file repositories/reference/linux-study-clean/drivers/iommu/msm_iommu.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/iommu/msm_iommu.c- Extension
.c- Size
- 19847 bytes
- Lines
- 815
- Domain
- Driver Families
- Bucket
- drivers/iommu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/kernel.hlinux/init.hlinux/platform_device.hlinux/errno.hlinux/io.hlinux/io-pgtable.hlinux/interrupt.hlinux/list.hlinux/spinlock.hlinux/slab.hlinux/iommu.hlinux/clk.hlinux/err.hasm/cacheflush.hlinux/sizes.hmsm_iommu_hw-8xxx.hmsm_iommu.h
Detected Declarations
struct msm_privfunction __enable_clocksfunction __disable_clocksfunction msm_iommu_resetfunction __flush_iotlbfunction list_for_each_entryfunction __flush_iotlb_rangefunction list_for_each_entryfunction list_for_each_entryfunction __flush_iotlb_walkfunction __flush_iotlb_pagefunction msm_iommu_alloc_ctxfunction msm_iommu_free_ctxfunction config_midsfunction __reset_contextfunction __program_contextfunction msm_iommu_domain_freefunction msm_iommu_domain_configfunction list_for_each_entryfunction msm_iommu_attach_devfunction list_for_each_entryfunction msm_iommu_identity_attachfunction list_for_each_entryfunction msm_iommu_mapfunction msm_iommu_sync_mapfunction msm_iommu_unmapfunction msm_iommu_iova_to_physfunction print_ctx_regsfunction insert_iommu_masterfunction qcom_iommu_of_xlatefunction msm_iommu_fault_handlerfunction msm_iommu_probe
Annotated Snippet
struct msm_priv {
struct list_head list_attached;
struct iommu_domain domain;
struct io_pgtable_cfg cfg;
struct io_pgtable_ops *iop;
struct device *dev;
spinlock_t pgtlock; /* pagetable lock */
};
static struct msm_priv *to_msm_priv(struct iommu_domain *dom)
{
return container_of(dom, struct msm_priv, domain);
}
static int __enable_clocks(struct msm_iommu_dev *iommu)
{
int ret;
ret = clk_enable(iommu->pclk);
if (ret)
goto fail;
if (iommu->clk) {
ret = clk_enable(iommu->clk);
if (ret)
clk_disable(iommu->pclk);
}
fail:
return ret;
}
static void __disable_clocks(struct msm_iommu_dev *iommu)
{
if (iommu->clk)
clk_disable(iommu->clk);
clk_disable(iommu->pclk);
}
static void msm_iommu_reset(void __iomem *base, int ncb)
{
int ctx;
SET_RPUE(base, 0);
SET_RPUEIE(base, 0);
SET_ESRRESTORE(base, 0);
SET_TBE(base, 0);
SET_CR(base, 0);
SET_SPDMBE(base, 0);
SET_TESTBUSCR(base, 0);
SET_TLBRSW(base, 0);
SET_GLOBAL_TLBIALL(base, 0);
SET_RPU_ACR(base, 0);
SET_TLBLKCRWE(base, 1);
for (ctx = 0; ctx < ncb; ctx++) {
SET_BPRCOSH(base, ctx, 0);
SET_BPRCISH(base, ctx, 0);
SET_BPRCNSH(base, ctx, 0);
SET_BPSHCFG(base, ctx, 0);
SET_BPMTCFG(base, ctx, 0);
SET_ACTLR(base, ctx, 0);
SET_SCTLR(base, ctx, 0);
SET_FSRRESTORE(base, ctx, 0);
SET_TTBR0(base, ctx, 0);
SET_TTBR1(base, ctx, 0);
SET_TTBCR(base, ctx, 0);
SET_BFBCR(base, ctx, 0);
SET_PAR(base, ctx, 0);
SET_FAR(base, ctx, 0);
SET_CTX_TLBIALL(base, ctx, 0);
SET_TLBFLPTER(base, ctx, 0);
SET_TLBSLPTER(base, ctx, 0);
SET_TLBLKCR(base, ctx, 0);
SET_CONTEXTIDR(base, ctx, 0);
}
}
static void __flush_iotlb(void *cookie)
{
struct msm_priv *priv = cookie;
struct msm_iommu_dev *iommu = NULL;
struct msm_iommu_ctx_dev *master;
int ret = 0;
list_for_each_entry(iommu, &priv->list_attached, dom_node) {
ret = __enable_clocks(iommu);
if (ret)
goto fail;
list_for_each_entry(master, &iommu->ctx_list, list)
Annotation
- Immediate include surface: `linux/kernel.h`, `linux/init.h`, `linux/platform_device.h`, `linux/errno.h`, `linux/io.h`, `linux/io-pgtable.h`, `linux/interrupt.h`, `linux/list.h`.
- Detected declarations: `struct msm_priv`, `function __enable_clocks`, `function __disable_clocks`, `function msm_iommu_reset`, `function __flush_iotlb`, `function list_for_each_entry`, `function __flush_iotlb_range`, `function list_for_each_entry`, `function list_for_each_entry`, `function __flush_iotlb_walk`.
- Atlas domain: Driver Families / drivers/iommu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.