drivers/iommu/riscv/iommu-platform.c
Source file repositories/reference/linux-study-clean/drivers/iommu/riscv/iommu-platform.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/iommu/riscv/iommu-platform.c- Extension
.c- Size
- 5152 bytes
- Lines
- 185
- Domain
- Driver Families
- Bucket
- drivers/iommu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/acpi.hlinux/irqchip/riscv-imsic.hlinux/kernel.hlinux/msi.hlinux/of_irq.hlinux/of_platform.hlinux/platform_device.hiommu-bits.hiommu.h
Detected Declarations
function riscv_iommu_write_msi_msgfunction riscv_iommu_platform_probefunction riscv_iommu_platform_removefunction riscv_iommu_platform_shutdown
Annotated Snippet
if (is_of_node(dev_fwnode(dev))) {
of_msi_configure(dev, to_of_node(dev->fwnode));
} else {
msi_domain = irq_find_matching_fwnode(imsic_acpi_get_fwnode(dev),
DOMAIN_BUS_PLATFORM_MSI);
dev_set_msi_domain(dev, msi_domain);
}
if (!dev_get_msi_domain(dev)) {
dev_warn(dev, "failed to find an MSI domain\n");
goto msi_fail;
}
ret = platform_device_msi_init_and_alloc_irqs(dev, iommu->irqs_count,
riscv_iommu_write_msi_msg);
if (ret) {
dev_warn(dev, "failed to allocate MSIs\n");
goto msi_fail;
}
for (vec = 0; vec < iommu->irqs_count; vec++)
iommu->irqs[vec] = msi_get_virq(dev, vec);
/* Enable message-signaled interrupts, fctl.WSI */
if (iommu->fctl & RISCV_IOMMU_FCTL_WSI) {
iommu->fctl ^= RISCV_IOMMU_FCTL_WSI;
riscv_iommu_writel(iommu, RISCV_IOMMU_REG_FCTL, iommu->fctl);
}
dev_info(dev, "using MSIs\n");
break;
msi_fail:
if (igs != RISCV_IOMMU_CAPABILITIES_IGS_BOTH) {
return dev_err_probe(dev, -ENODEV,
"unable to use wire-signaled interrupts\n");
}
fallthrough;
case RISCV_IOMMU_CAPABILITIES_IGS_WSI:
ret = platform_irq_count(pdev);
if (ret <= 0)
return dev_err_probe(dev, -ENODEV,
"no IRQ resources provided\n");
iommu->irqs_count = ret;
if (iommu->irqs_count > RISCV_IOMMU_INTR_COUNT)
iommu->irqs_count = RISCV_IOMMU_INTR_COUNT;
for (vec = 0; vec < iommu->irqs_count; vec++)
iommu->irqs[vec] = platform_get_irq(pdev, vec);
/* Enable wire-signaled interrupts, fctl.WSI */
if (!(iommu->fctl & RISCV_IOMMU_FCTL_WSI)) {
iommu->fctl |= RISCV_IOMMU_FCTL_WSI;
riscv_iommu_writel(iommu, RISCV_IOMMU_REG_FCTL, iommu->fctl);
}
dev_info(dev, "using wire-signaled interrupts\n");
break;
default:
return dev_err_probe(dev, -ENODEV, "invalid IGS\n");
}
return riscv_iommu_init(iommu);
};
static void riscv_iommu_platform_remove(struct platform_device *pdev)
{
struct riscv_iommu_device *iommu = dev_get_drvdata(&pdev->dev);
bool msi = !(iommu->fctl & RISCV_IOMMU_FCTL_WSI);
riscv_iommu_remove(iommu);
if (msi)
platform_device_msi_free_irqs_all(&pdev->dev);
};
static void riscv_iommu_platform_shutdown(struct platform_device *pdev)
{
riscv_iommu_disable(dev_get_drvdata(&pdev->dev));
};
static const struct of_device_id riscv_iommu_of_match[] = {
{.compatible = "riscv,iommu",},
{},
};
static const struct acpi_device_id riscv_iommu_acpi_match[] = {
Annotation
- Immediate include surface: `linux/acpi.h`, `linux/irqchip/riscv-imsic.h`, `linux/kernel.h`, `linux/msi.h`, `linux/of_irq.h`, `linux/of_platform.h`, `linux/platform_device.h`, `iommu-bits.h`.
- Detected declarations: `function riscv_iommu_write_msi_msg`, `function riscv_iommu_platform_probe`, `function riscv_iommu_platform_remove`, `function riscv_iommu_platform_shutdown`.
- Atlas domain: Driver Families / drivers/iommu.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.