drivers/iommu/rockchip-iommu.c
Source file repositories/reference/linux-study-clean/drivers/iommu/rockchip-iommu.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/iommu/rockchip-iommu.c- Extension
.c- Size
- 37840 bytes
- Lines
- 1394
- Domain
- Driver Families
- Bucket
- drivers/iommu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/clk.hlinux/compiler.hlinux/delay.hlinux/device.hlinux/dma-mapping.hlinux/errno.hlinux/interrupt.hlinux/io.hlinux/iommu.hlinux/iopoll.hlinux/list.hlinux/mm.hlinux/init.hlinux/of.hlinux/of_platform.hlinux/platform_device.hlinux/pm_runtime.hlinux/slab.hlinux/spinlock.hlinux/string_choices.hiommu-pages.h
Detected Declarations
struct rk_iommu_domainstruct rk_iommu_opsstruct rk_iommustruct rk_iommudatafunction rk_table_flushfunction Tablesfunction rk_dte_pt_address_v2function rk_dte_is_pt_validfunction rk_mk_dtefunction rk_mk_dte_v2function rk_pte_is_page_validfunction rk_mk_ptefunction rk_mk_pte_v2function rk_mk_pte_invalidfunction iovafunction rk_iova_pte_indexfunction rk_iova_page_offsetfunction rk_iommu_readfunction rk_iommu_writefunction rk_iommu_commandfunction rk_iommu_base_commandfunction rk_iommu_zap_linesfunction rk_iommu_is_stall_activefunction rk_iommu_is_paging_enabledfunction rk_iommu_is_reset_donefunction rk_iommu_enable_stallfunction rk_iommu_disable_stallfunction rk_iommu_enable_pagingfunction rk_iommu_disable_pagingfunction rk_iommu_force_resetfunction log_iovafunction rk_iommu_irqfunction rk_iommu_iova_to_physfunction rk_iommu_zap_iovafunction rk_iommu_zap_iova_first_lastfunction rk_iommu_unmap_iovafunction rk_iommu_map_iovafunction rk_iommu_mapfunction rk_iommu_unmapfunction rk_iommu_disablefunction rk_iommu_enablefunction rk_iommu_identity_attachfunction rk_iommu_attach_devicefunction rk_iommu_domain_freefunction rk_iommu_release_devicefunction rk_iommu_of_xlatefunction rk_iommu_probefunction rk_iommu_shutdown
Annotated Snippet
struct rk_iommu_domain {
struct list_head iommus;
u32 *dt; /* page directory table */
dma_addr_t dt_dma;
spinlock_t iommus_lock; /* lock for iommus list */
spinlock_t dt_lock; /* lock for modifying page directory table */
struct device *dma_dev;
struct iommu_domain domain;
};
/* list of clocks required by IOMMU */
static const char * const rk_iommu_clocks[] = {
"aclk", "iface",
};
struct rk_iommu_ops {
phys_addr_t (*pt_address)(u32 dte);
u32 (*mk_dtentries)(dma_addr_t pt_dma);
u32 (*mk_ptentries)(phys_addr_t page, int prot);
u64 dma_bit_mask;
gfp_t gfp_flags;
};
struct rk_iommu {
struct device *dev;
void __iomem **bases;
int num_mmu;
int num_irq;
struct clk_bulk_data *clocks;
int num_clocks;
bool reset_disabled;
struct iommu_device iommu;
struct list_head node; /* entry in rk_iommu_domain.iommus */
struct iommu_domain *domain; /* domain to which iommu is attached */
};
struct rk_iommudata {
struct device_link *link; /* runtime PM link from IOMMU to master */
struct rk_iommu *iommu;
};
static const struct rk_iommu_ops *rk_ops;
static struct iommu_domain rk_identity_domain;
static inline void rk_table_flush(struct rk_iommu_domain *dom, dma_addr_t dma,
unsigned int count)
{
size_t size = count * sizeof(u32); /* count of u32 entry */
dma_sync_single_for_device(dom->dma_dev, dma, size, DMA_TO_DEVICE);
}
static struct rk_iommu_domain *to_rk_domain(struct iommu_domain *dom)
{
return container_of(dom, struct rk_iommu_domain, domain);
}
/*
* The Rockchip rk3288 iommu uses a 2-level page table.
* The first level is the "Directory Table" (DT).
* The DT consists of 1024 4-byte Directory Table Entries (DTEs), each pointing
* to a "Page Table".
* The second level is the 1024 Page Tables (PT).
* Each PT consists of 1024 4-byte Page Table Entries (PTEs), each pointing to
* a 4 KB page of physical memory.
*
* The DT and each PT fits in a single 4 KB page (4-bytes * 1024 entries).
* Each iommu device has a MMU_DTE_ADDR register that contains the physical
* address of the start of the DT page.
*
* The structure of the page table is as follows:
*
* DT
* MMU_DTE_ADDR -> +-----+
* | |
* +-----+ PT
* | DTE | -> +-----+
* +-----+ | | Memory
* | | +-----+ Page
* | | | PTE | -> +-----+
* +-----+ +-----+ | |
* | | | |
* | | | |
* +-----+ | |
* | |
* | |
* +-----+
*/
Annotation
- Immediate include surface: `linux/clk.h`, `linux/compiler.h`, `linux/delay.h`, `linux/device.h`, `linux/dma-mapping.h`, `linux/errno.h`, `linux/interrupt.h`, `linux/io.h`.
- Detected declarations: `struct rk_iommu_domain`, `struct rk_iommu_ops`, `struct rk_iommu`, `struct rk_iommudata`, `function rk_table_flush`, `function Tables`, `function rk_dte_pt_address_v2`, `function rk_dte_is_pt_valid`, `function rk_mk_dte`, `function rk_mk_dte_v2`.
- Atlas domain: Driver Families / drivers/iommu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.