drivers/iommu/vsi-iommu.c
Source file repositories/reference/linux-study-clean/drivers/iommu/vsi-iommu.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/iommu/vsi-iommu.c- Extension
.c- Size
- 20666 bytes
- Lines
- 792
- Domain
- Driver Families
- Bucket
- drivers/iommu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/clk.hlinux/compiler.hlinux/delay.hlinux/device.hlinux/dma-mapping.hlinux/errno.hlinux/init.hlinux/interrupt.hlinux/io.hlinux/iommu.hlinux/list.hlinux/mm.hlinux/module.hlinux/of.hlinux/of_iommu.hlinux/of_platform.hlinux/platform_device.hlinux/pm_runtime.hlinux/slab.hlinux/spinlock.hiommu-pages.h
Detected Declarations
struct vsi_iommustruct vsi_iommu_domainfunction vsi_dte_pt_addressfunction vsi_mk_dtefunction vsi_pte_page_addressfunction vsi_mk_ptefunction vsi_dte_is_pt_validfunction vsi_pte_is_page_validfunction vsi_mk_pte_invalidfunction vsi_mk_ptafunction vsi_table_flushfunction vsi_iova_dte_indexfunction vsi_iova_pte_indexfunction vsi_iova_page_offsetfunction vsi_iommu_irqfunction vsi_iommu_iova_to_physfunction vsi_iommu_unmap_iovafunction vsi_iommu_map_iovafunction vsi_iommu_flush_tlbfunction list_for_each_entryfunction vsi_iommu_unmapfunction vsi_iommu_mapfunction vsi_iommu_disablefunction vsi_iommu_identity_attachfunction vsi_iommu_enablefunction vsi_iommu_attach_devicefunction vsi_iommu_domain_freefunction vsi_iommu_release_devicefunction vsi_iommu_of_xlatefunction vsi_iommu_probefunction vsi_iommu_shutdownfunction vsi_iommu_suspendfunction vsi_iommu_resume
Annotated Snippet
struct vsi_iommu {
struct device *dev;
void __iomem *regs;
struct clk_bulk_data *clocks;
int num_clocks;
struct iommu_device iommu;
struct list_head node; /* entry in vsi_iommu_domain.iommus */
struct iommu_domain *domain; /* domain to which iommu is attached */
spinlock_t lock; /* lock to protect vsi_iommu fields */
int irq;
bool enable;
};
struct vsi_iommu_domain {
struct list_head iommus;
struct device *dev;
u32 *dt;
dma_addr_t dt_dma;
struct iommu_domain domain;
u64 *pta;
dma_addr_t pta_dma;
spinlock_t lock; /* lock to protect vsi_iommu_domain fields */
};
static struct iommu_domain vsi_identity_domain;
#define NUM_DT_ENTRIES 1024
#define NUM_PT_ENTRIES 1024
#define SPAGE_SIZE BIT(12)
/* vsi iommu regs address */
#define VSI_MMU_CONFIG1_BASE 0x1ac
#define VSI_MMU_AHB_EXCEPTION_BASE 0x380
#define VSI_MMU_AHB_CONTROL_BASE 0x388
#define VSI_MMU_AHB_TLB_ARRAY_BASE_L_BASE 0x38C
/* MMU register offsets */
#define VSI_MMU_FLUSH_BASE 0x184
#define VSI_MMU_BIT_FLUSH BIT(4)
#define VSI_MMU_PAGE_FAULT_ADDR 0x380
#define VSI_MMU_STATUS_BASE 0x384 /* IRQ status */
#define VSI_MMU_BIT_ENABLE BIT(0)
#define VSI_MMU_OUT_OF_BOUND BIT(28)
/* Irq mask */
#define VSI_MMU_IRQ_MASK 0x7
#define VSI_DTE_PT_ADDRESS_MASK 0xffffffc0
#define VSI_DTE_PT_VALID BIT(0)
#define VSI_PAGE_DESC_LO_MASK 0xfffff000
#define VSI_PAGE_DESC_HI_MASK GENMASK_ULL(39, 32)
#define VSI_PAGE_DESC_HI_SHIFT (32 - 4)
static inline phys_addr_t vsi_dte_pt_address(u32 dte)
{
return (phys_addr_t)dte & VSI_DTE_PT_ADDRESS_MASK;
}
static inline u32 vsi_mk_dte(u32 dte)
{
return (phys_addr_t)dte | VSI_DTE_PT_VALID;
}
#define VSI_PTE_PAGE_WRITABLE BIT(2)
#define VSI_PTE_PAGE_VALID BIT(0)
static inline phys_addr_t vsi_pte_page_address(u64 pte)
{
return ((pte << VSI_PAGE_DESC_HI_SHIFT) & VSI_PAGE_DESC_HI_MASK) |
(pte & VSI_PAGE_DESC_LO_MASK);
}
static u32 vsi_mk_pte(phys_addr_t page, int prot)
{
u32 flags = 0;
flags |= (prot & IOMMU_WRITE) ? VSI_PTE_PAGE_WRITABLE : 0;
page = (page & VSI_PAGE_DESC_LO_MASK) |
((page & VSI_PAGE_DESC_HI_MASK) >> VSI_PAGE_DESC_HI_SHIFT);
return page | flags | VSI_PTE_PAGE_VALID;
}
#define VSI_DTE_PT_VALID BIT(0)
Annotation
- Immediate include surface: `linux/clk.h`, `linux/compiler.h`, `linux/delay.h`, `linux/device.h`, `linux/dma-mapping.h`, `linux/errno.h`, `linux/init.h`, `linux/interrupt.h`.
- Detected declarations: `struct vsi_iommu`, `struct vsi_iommu_domain`, `function vsi_dte_pt_address`, `function vsi_mk_dte`, `function vsi_pte_page_address`, `function vsi_mk_pte`, `function vsi_dte_is_pt_valid`, `function vsi_pte_is_page_valid`, `function vsi_mk_pte_invalid`, `function vsi_mk_pta`.
- Atlas domain: Driver Families / drivers/iommu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.