drivers/irqchip/irq-alpine-msi.c
Source file repositories/reference/linux-study-clean/drivers/irqchip/irq-alpine-msi.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/irqchip/irq-alpine-msi.c- Extension
.c- Size
- 6694 bytes
- Lines
- 247
- Domain
- Driver Families
- Bucket
- drivers/irqchip
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/irqchip.hlinux/irqchip/arm-gic.hlinux/irqchip/irq-msi-lib.hlinux/msi.hlinux/of.hlinux/of_address.hlinux/of_irq.hlinux/of_pci.hlinux/pci.hlinux/slab.hasm/irq.hasm/msi.h
Detected Declarations
struct alpine_msix_datafunction alpine_msix_allocate_sgifunction alpine_msix_free_sgifunction alpine_msix_compose_msi_msgfunction alpine_msix_gic_domain_allocfunction alpine_msix_middle_domain_allocfunction alpine_msix_middle_domain_freefunction alpine_msix_init_domainsfunction alpine_msix_init
Annotated Snippet
struct alpine_msix_data {
spinlock_t msi_map_lock;
phys_addr_t addr;
u32 spi_first; /* The SGI number that MSIs start */
u32 num_spis; /* The number of SGIs for MSIs */
unsigned long *msi_map;
};
static int alpine_msix_allocate_sgi(struct alpine_msix_data *priv, int num_req)
{
int first;
guard(spinlock)(&priv->msi_map_lock);
first = bitmap_find_next_zero_area(priv->msi_map, priv->num_spis, 0, num_req, 0);
if (first >= priv->num_spis)
return -ENOSPC;
bitmap_set(priv->msi_map, first, num_req);
return priv->spi_first + first;
}
static void alpine_msix_free_sgi(struct alpine_msix_data *priv, unsigned int sgi, int num_req)
{
int first = sgi - priv->spi_first;
guard(spinlock)(&priv->msi_map_lock);
bitmap_clear(priv->msi_map, first, num_req);
}
static void alpine_msix_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
{
struct alpine_msix_data *priv = irq_data_get_irq_chip_data(data);
phys_addr_t msg_addr = priv->addr;
msg_addr |= (data->hwirq << 3);
msg->address_hi = upper_32_bits(msg_addr);
msg->address_lo = lower_32_bits(msg_addr);
msg->data = 0;
}
static struct irq_chip middle_irq_chip = {
.name = "alpine_msix_middle",
.irq_mask = irq_chip_mask_parent,
.irq_unmask = irq_chip_unmask_parent,
.irq_eoi = irq_chip_eoi_parent,
.irq_set_affinity = irq_chip_set_affinity_parent,
.irq_compose_msi_msg = alpine_msix_compose_msi_msg,
};
static int alpine_msix_gic_domain_alloc(struct irq_domain *domain, unsigned int virq, int sgi)
{
struct irq_fwspec fwspec;
struct irq_data *d;
int ret;
if (!is_of_node(domain->parent->fwnode))
return -EINVAL;
fwspec.fwnode = domain->parent->fwnode;
fwspec.param_count = 3;
fwspec.param[0] = 0;
fwspec.param[1] = sgi;
fwspec.param[2] = IRQ_TYPE_EDGE_RISING;
ret = irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec);
if (ret)
return ret;
d = irq_domain_get_irq_data(domain->parent, virq);
d->chip->irq_set_type(d, IRQ_TYPE_EDGE_RISING);
return 0;
}
static int alpine_msix_middle_domain_alloc(struct irq_domain *domain, unsigned int virq,
unsigned int nr_irqs, void *args)
{
struct alpine_msix_data *priv = domain->host_data;
int sgi, err, i;
sgi = alpine_msix_allocate_sgi(priv, nr_irqs);
if (sgi < 0)
return sgi;
for (i = 0; i < nr_irqs; i++) {
err = alpine_msix_gic_domain_alloc(domain, virq + i, sgi + i);
if (err)
goto err_sgi;
irq_domain_set_hwirq_and_chip(domain, virq + i, sgi + i,
&middle_irq_chip, priv);
Annotation
- Immediate include surface: `linux/irqchip.h`, `linux/irqchip/arm-gic.h`, `linux/irqchip/irq-msi-lib.h`, `linux/msi.h`, `linux/of.h`, `linux/of_address.h`, `linux/of_irq.h`, `linux/of_pci.h`.
- Detected declarations: `struct alpine_msix_data`, `function alpine_msix_allocate_sgi`, `function alpine_msix_free_sgi`, `function alpine_msix_compose_msi_msg`, `function alpine_msix_gic_domain_alloc`, `function alpine_msix_middle_domain_alloc`, `function alpine_msix_middle_domain_free`, `function alpine_msix_init_domains`, `function alpine_msix_init`.
- Atlas domain: Driver Families / drivers/irqchip.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.