drivers/irqchip/irq-csky-mpintc.c
Source file repositories/reference/linux-study-clean/drivers/irqchip/irq-csky-mpintc.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/irqchip/irq-csky-mpintc.c- Extension
.c- Size
- 6596 bytes
- Lines
- 282
- Domain
- Driver Families
- Bucket
- drivers/irqchip
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/kernel.hlinux/init.hlinux/of.hlinux/of_address.hlinux/module.hlinux/irqdomain.hlinux/irqchip.hlinux/irq.hlinux/interrupt.hlinux/smp.hlinux/io.hasm/irq.hasm/traps.hasm/reg_ops.h
Detected Declarations
function setup_triggerfunction csky_mpintc_handlerfunction csky_mpintc_unmaskfunction csky_mpintc_maskfunction csky_mpintc_eoifunction csky_mpintc_set_typefunction csky_irq_set_affinityfunction csky_irqdomain_mapfunction csky_irq_domain_xlate_cellsfunction csky_mpintc_send_ipifunction csky_mpintc_init
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/module.h>
#include <linux/irqdomain.h>
#include <linux/irqchip.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/smp.h>
#include <linux/io.h>
#include <asm/irq.h>
#include <asm/traps.h>
#include <asm/reg_ops.h>
static struct irq_domain *root_domain;
static void __iomem *INTCG_base;
static void __iomem *INTCL_base;
#define IPI_IRQ 15
#define INTC_IRQS 256
#define COMM_IRQ_BASE 32
#define INTCG_SIZE 0x8000
#define INTCL_SIZE 0x1000
#define INTCG_ICTLR 0x0
#define INTCG_CICFGR 0x100
#define INTCG_CIDSTR 0x1000
#define INTCL_PICTLR 0x0
#define INTCL_CFGR 0x14
#define INTCL_SIGR 0x60
#define INTCL_RDYIR 0x6c
#define INTCL_SENR 0xa0
#define INTCL_CENR 0xa4
#define INTCL_CACR 0xb4
static DEFINE_PER_CPU(void __iomem *, intcl_reg);
static unsigned long *__trigger;
#define IRQ_OFFSET(irq) ((irq < COMM_IRQ_BASE) ? irq : (irq - COMM_IRQ_BASE))
#define TRIG_BYTE_OFFSET(i) ((((i) * 2) / 32) * 4)
#define TRIG_BIT_OFFSET(i) (((i) * 2) % 32)
#define TRIG_VAL(trigger, irq) (trigger << TRIG_BIT_OFFSET(IRQ_OFFSET(irq)))
#define TRIG_VAL_MSK(irq) (~(3 << TRIG_BIT_OFFSET(IRQ_OFFSET(irq))))
#define TRIG_BASE(irq) \
(TRIG_BYTE_OFFSET(IRQ_OFFSET(irq)) + ((irq < COMM_IRQ_BASE) ? \
(this_cpu_read(intcl_reg) + INTCL_CFGR) : (INTCG_base + INTCG_CICFGR)))
static DEFINE_SPINLOCK(setup_lock);
static void setup_trigger(unsigned long irq, unsigned long trigger)
{
unsigned int tmp;
spin_lock(&setup_lock);
/* setup trigger */
tmp = readl_relaxed(TRIG_BASE(irq)) & TRIG_VAL_MSK(irq);
writel_relaxed(tmp | TRIG_VAL(trigger, irq), TRIG_BASE(irq));
spin_unlock(&setup_lock);
}
static void csky_mpintc_handler(struct pt_regs *regs)
{
void __iomem *reg_base = this_cpu_read(intcl_reg);
generic_handle_domain_irq(root_domain,
readl_relaxed(reg_base + INTCL_RDYIR));
}
static void csky_mpintc_unmask(struct irq_data *d)
{
void __iomem *reg_base = this_cpu_read(intcl_reg);
setup_trigger(d->hwirq, __trigger[d->hwirq]);
writel_relaxed(d->hwirq, reg_base + INTCL_SENR);
}
static void csky_mpintc_mask(struct irq_data *d)
Annotation
- Immediate include surface: `linux/kernel.h`, `linux/init.h`, `linux/of.h`, `linux/of_address.h`, `linux/module.h`, `linux/irqdomain.h`, `linux/irqchip.h`, `linux/irq.h`.
- Detected declarations: `function setup_trigger`, `function csky_mpintc_handler`, `function csky_mpintc_unmask`, `function csky_mpintc_mask`, `function csky_mpintc_eoi`, `function csky_mpintc_set_type`, `function csky_irq_set_affinity`, `function csky_irqdomain_map`, `function csky_irq_domain_xlate_cells`, `function csky_mpintc_send_ipi`.
- Atlas domain: Driver Families / drivers/irqchip.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.