drivers/irqchip/irq-jcore-aic.c

Source file repositories/reference/linux-study-clean/drivers/irqchip/irq-jcore-aic.c

File Facts

System
Linux kernel
Corpus path
drivers/irqchip/irq-jcore-aic.c
Extension
.c
Size
3253 bytes
Lines
120
Domain
Driver Families
Bucket
drivers/irqchip
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

for_each_present_cpu(cpu) {
			void __iomem *base = of_iomap(node, cpu);

			if (!base) {
				pr_err("Unable to map AIC for cpu %u\n", cpu);
				return -ENOMEM;
			}
			__raw_writel(0xffffffff, base + JCORE_AIC1_INTPRI_REG);
			iounmap(base);
		}
		min_irq = JCORE_AIC1_MIN_HWIRQ;
	}

	/*
	 * The irq chip framework requires either mask/unmask or enable/disable
	 * function pointers to be provided, but the hardware does not have any
	 * such mechanism; the only interrupt masking is at the cpu level and
	 * it affects all interrupts. We provide dummy mask/unmask. The hardware
	 * handles all interrupt control and clears pending status when the cpu
	 * accepts the interrupt.
	 */
	jcore_aic.irq_mask = noop;
	jcore_aic.irq_unmask = noop;
	jcore_aic.name = "AIC";

	ret = irq_alloc_descs(-1, min_irq, dom_sz - min_irq,
			      of_node_to_nid(node));

	if (ret < 0)
		return ret;

	domain = irq_domain_create_legacy(of_fwnode_handle(node), dom_sz - min_irq, min_irq,
					  min_irq, &jcore_aic_irqdomain_ops, &jcore_aic);
	if (!domain)
		return -ENOMEM;

	return 0;
}

IRQCHIP_DECLARE(jcore_aic2, "jcore,aic2", aic_irq_of_init);
IRQCHIP_DECLARE(jcore_aic1, "jcore,aic1", aic_irq_of_init);

Annotation

Implementation Notes