drivers/irqchip/irq-loongson-htvec.c
Source file repositories/reference/linux-study-clean/drivers/irqchip/irq-loongson-htvec.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/irqchip/irq-loongson-htvec.c- Extension
.c- Size
- 7556 bytes
- Lines
- 330
- Domain
- Driver Families
- Bucket
- drivers/irqchip
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/interrupt.hlinux/irq.hlinux/irqchip.hlinux/irqdomain.hlinux/irqchip/chained_irq.hlinux/kernel.hlinux/platform_device.hlinux/of_address.hlinux/of_irq.hlinux/syscore_ops.hirq-loongson.h
Detected Declarations
struct htvecfunction htvec_irq_dispatchfunction htvec_ack_irqfunction htvec_mask_irqfunction htvec_unmask_irqfunction htvec_domain_allocfunction htvec_domain_freefunction htvec_resetfunction htvec_suspendfunction htvec_resumefunction htvec_initfunction htvec_of_initfunction pch_pic_parse_madtfunction pch_msi_parse_madtfunction acpi_cascade_irqdomain_initfunction htvec_acpi_init
Annotated Snippet
struct htvec {
int num_parents;
void __iomem *base;
struct irq_domain *htvec_domain;
raw_spinlock_t htvec_lock;
u32 saved_vec_en[HTVEC_MAX_PARENT_IRQ];
};
static struct htvec *htvec_priv;
static void htvec_irq_dispatch(struct irq_desc *desc)
{
int i;
u32 pending;
bool handled = false;
struct irq_chip *chip = irq_desc_get_chip(desc);
struct htvec *priv = irq_desc_get_handler_data(desc);
chained_irq_enter(chip, desc);
for (i = 0; i < priv->num_parents; i++) {
pending = readl(priv->base + 4 * i);
while (pending) {
int bit = __ffs(pending);
generic_handle_domain_irq(priv->htvec_domain,
bit + VEC_COUNT_PER_REG * i);
pending &= ~BIT(bit);
handled = true;
}
}
if (!handled)
spurious_interrupt();
chained_irq_exit(chip, desc);
}
static void htvec_ack_irq(struct irq_data *d)
{
struct htvec *priv = irq_data_get_irq_chip_data(d);
writel(BIT(VEC_REG_BIT(d->hwirq)),
priv->base + VEC_REG_IDX(d->hwirq) * 4);
}
static void htvec_mask_irq(struct irq_data *d)
{
u32 reg;
void __iomem *addr;
struct htvec *priv = irq_data_get_irq_chip_data(d);
raw_spin_lock(&priv->htvec_lock);
addr = priv->base + HTVEC_EN_OFF;
addr += VEC_REG_IDX(d->hwirq) * 4;
reg = readl(addr);
reg &= ~BIT(VEC_REG_BIT(d->hwirq));
writel(reg, addr);
raw_spin_unlock(&priv->htvec_lock);
}
static void htvec_unmask_irq(struct irq_data *d)
{
u32 reg;
void __iomem *addr;
struct htvec *priv = irq_data_get_irq_chip_data(d);
raw_spin_lock(&priv->htvec_lock);
addr = priv->base + HTVEC_EN_OFF;
addr += VEC_REG_IDX(d->hwirq) * 4;
reg = readl(addr);
reg |= BIT(VEC_REG_BIT(d->hwirq));
writel(reg, addr);
raw_spin_unlock(&priv->htvec_lock);
}
static struct irq_chip htvec_irq_chip = {
.name = "LOONGSON_HTVEC",
.irq_mask = htvec_mask_irq,
.irq_unmask = htvec_unmask_irq,
.irq_ack = htvec_ack_irq,
};
static int htvec_domain_alloc(struct irq_domain *domain, unsigned int virq,
unsigned int nr_irqs, void *arg)
{
int ret;
unsigned long hwirq;
unsigned int type, i;
struct htvec *priv = domain->host_data;
Annotation
- Immediate include surface: `linux/interrupt.h`, `linux/irq.h`, `linux/irqchip.h`, `linux/irqdomain.h`, `linux/irqchip/chained_irq.h`, `linux/kernel.h`, `linux/platform_device.h`, `linux/of_address.h`.
- Detected declarations: `struct htvec`, `function htvec_irq_dispatch`, `function htvec_ack_irq`, `function htvec_mask_irq`, `function htvec_unmask_irq`, `function htvec_domain_alloc`, `function htvec_domain_free`, `function htvec_reset`, `function htvec_suspend`, `function htvec_resume`.
- Atlas domain: Driver Families / drivers/irqchip.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.