drivers/irqchip/irq-meson-gpio.c

Source file repositories/reference/linux-study-clean/drivers/irqchip/irq-meson-gpio.c

File Facts

System
Linux kernel
Corpus path
drivers/irqchip/irq-meson-gpio.c
Extension
.c
Size
20448 bytes
Lines
727
Domain
Driver Families
Bucket
drivers/irqchip
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct irq_ctl_ops {
	void (*gpio_irq_sel_pin)(struct meson_gpio_irq_controller *ctl,
				 unsigned int channel, unsigned long hwirq);
	void (*gpio_irq_init)(struct meson_gpio_irq_controller *ctl);
	int (*gpio_irq_set_type)(struct meson_gpio_irq_controller *ctl,
				 unsigned int type, u32 *channel_hwirq);
};

struct meson_gpio_irq_params {
	unsigned int nr_hwirq;
	unsigned int nr_channels;
	bool support_edge_both;
	unsigned int edge_both_offset;
	unsigned int edge_single_offset;
	unsigned int edge_pol_reg;
	unsigned int pol_low_offset;
	unsigned int pin_sel_mask;
	struct irq_ctl_ops ops;
};

#define INIT_MESON_COMMON(irqs, init, sel, type)		\
	.nr_hwirq = irqs,					\
	.ops = {						\
		.gpio_irq_init = init,				\
		.gpio_irq_sel_pin = sel,			\
		.gpio_irq_set_type = type,			\
	},

#define INIT_MESON8_COMMON_DATA(irqs)				\
	INIT_MESON_COMMON(irqs, meson_gpio_irq_init_dummy,	\
			  meson8_gpio_irq_sel_pin,		\
			  meson8_gpio_irq_set_type)		\
	.edge_single_offset = 0,				\
	.pol_low_offset = 16,					\
	.pin_sel_mask = 0xff,					\
	.nr_channels = 8,					\

#define INIT_MESON_A1_COMMON_DATA(irqs)				\
	INIT_MESON_COMMON(irqs, meson_a1_gpio_irq_init,		\
			  meson_a1_gpio_irq_sel_pin,		\
			  meson8_gpio_irq_set_type)		\
	.support_edge_both = true,				\
	.edge_both_offset = 16,					\
	.edge_single_offset = 8,				\
	.pol_low_offset = 0,					\
	.pin_sel_mask = 0x7f,					\
	.nr_channels = 8,					\

#define INIT_MESON_A4_AO_COMMON_DATA(irqs)			\
	INIT_MESON_COMMON(irqs, meson_a1_gpio_irq_init,		\
			  meson_a1_gpio_irq_sel_pin,		\
			  meson_s4_gpio_irq_set_type)		\
	.support_edge_both = true,				\
	.edge_both_offset = 0,					\
	.edge_single_offset = 12,				\
	.edge_pol_reg = 0x8,					\
	.pol_low_offset = 0,					\
	.pin_sel_mask = 0xff,					\
	.nr_channels = 2,					\

#define INIT_MESON_A9_AO_COMMON_DATA(irqs)			\
	INIT_MESON_COMMON(irqs, meson_a1_gpio_irq_init,		\
			  meson_a1_gpio_irq_sel_pin,		\
			  meson_a9_ao_gpio_irq_set_type)	\
	.support_edge_both = true,				\
	.edge_both_offset = 0,					\
	.edge_single_offset = 0,				\
	.edge_pol_reg = 0x2c,					\
	.pol_low_offset = 0,					\
	.pin_sel_mask = 0xff,					\
	.nr_channels = 20,					\

#define INIT_MESON_S4_COMMON_DATA(irqs)				\
	INIT_MESON_COMMON(irqs, meson_a1_gpio_irq_init,		\
			  meson_a1_gpio_irq_sel_pin,		\
			  meson_s4_gpio_irq_set_type)		\
	.support_edge_both = true,				\
	.edge_both_offset = 0,					\
	.edge_single_offset = 12,				\
	.edge_pol_reg = 0x1c,					\
	.pol_low_offset = 0,					\
	.pin_sel_mask = 0xff,					\
	.nr_channels = 12,					\

static const struct meson_gpio_irq_params meson8_params = {
	INIT_MESON8_COMMON_DATA(134)
};

static const struct meson_gpio_irq_params meson8b_params = {
	INIT_MESON8_COMMON_DATA(119)

Annotation

Implementation Notes