drivers/irqchip/irq-riscv-imsic-state.h
Source file repositories/reference/linux-study-clean/drivers/irqchip/irq-riscv-imsic-state.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/irqchip/irq-riscv-imsic-state.h- Extension
.h- Size
- 2890 bytes
- Lines
- 110
- Domain
- Driver Families
- Bucket
- drivers/irqchip
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/irqchip/riscv-imsic.hlinux/irqdomain.hlinux/fwnode.hlinux/timer.h
Detected Declarations
struct imsic_vectorstruct imsic_local_privstruct imsic_privfunction __imsic_id_set_enablefunction __imsic_id_clear_enablefunction imsic_vector_isenabled
Annotated Snippet
struct imsic_vector {
/* Fixed details of the vector */
unsigned int cpu;
unsigned int local_id;
/* Details saved by driver in the vector */
unsigned int irq;
/* Details accessed using local lock held */
bool enable;
struct imsic_vector *move_next;
struct imsic_vector *move_prev;
};
struct imsic_local_priv {
/* Local lock to protect vector enable/move variables and dirty bitmap */
raw_spinlock_t lock;
/* Local dirty bitmap for synchronization */
unsigned long *dirty_bitmap;
#ifdef CONFIG_SMP
/* Local timer for synchronization */
struct timer_list timer;
#endif
/* Local vector table */
struct imsic_vector *vectors;
};
struct imsic_priv {
/* Device details */
struct fwnode_handle *fwnode;
/* Global configuration common for all HARTs */
struct imsic_global_config global;
/* Per-CPU state */
struct imsic_local_priv __percpu *lpriv;
/* State of IRQ matrix allocator */
raw_spinlock_t matrix_lock;
struct irq_matrix *matrix;
/* IRQ domains (created by platform driver) */
struct irq_domain *base_domain;
};
extern bool imsic_noipi;
extern struct imsic_priv *imsic;
void __imsic_eix_update(unsigned long base_id, unsigned long num_id, bool pend, bool val);
static inline void __imsic_id_set_enable(unsigned long id)
{
__imsic_eix_update(id, 1, false, true);
}
static inline void __imsic_id_clear_enable(unsigned long id)
{
__imsic_eix_update(id, 1, false, false);
}
void imsic_local_sync_all(bool force_all);
void imsic_local_delivery(bool enable);
void imsic_vector_mask(struct imsic_vector *vec);
void imsic_vector_unmask(struct imsic_vector *vec);
static inline bool imsic_vector_isenabled(struct imsic_vector *vec)
{
return READ_ONCE(vec->enable);
}
static inline struct imsic_vector *imsic_vector_get_move(struct imsic_vector *vec)
{
return READ_ONCE(vec->move_prev);
}
void imsic_vector_force_move_cleanup(struct imsic_vector *vec);
void imsic_vector_move(struct imsic_vector *old_vec, struct imsic_vector *new_vec);
struct imsic_vector *imsic_vector_alloc(unsigned int irq, const struct cpumask *mask);
void imsic_vector_free(struct imsic_vector *vector);
void imsic_vector_debug_show(struct seq_file *m, struct imsic_vector *vec, int ind);
void imsic_vector_debug_show_summary(struct seq_file *m, int ind);
void imsic_state_online(void);
void imsic_state_offline(void);
int imsic_setup_state(struct fwnode_handle *fwnode, void *opaque);
int imsic_irqdomain_init(void);
Annotation
- Immediate include surface: `linux/irqchip/riscv-imsic.h`, `linux/irqdomain.h`, `linux/fwnode.h`, `linux/timer.h`.
- Detected declarations: `struct imsic_vector`, `struct imsic_local_priv`, `struct imsic_priv`, `function __imsic_id_set_enable`, `function __imsic_id_clear_enable`, `function imsic_vector_isenabled`.
- Atlas domain: Driver Families / drivers/irqchip.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.