drivers/irqchip/irq-riscv-intc.c
Source file repositories/reference/linux-study-clean/drivers/irqchip/irq-riscv-intc.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/irqchip/irq-riscv-intc.c- Extension
.c- Size
- 10368 bytes
- Lines
- 395
- Domain
- Driver Families
- Bucket
- drivers/irqchip
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/acpi.hlinux/atomic.hlinux/bits.hlinux/cpu.hlinux/irq.hlinux/irqchip.hlinux/irqdomain.hlinux/interrupt.hlinux/module.hlinux/of.hlinux/smp.hlinux/soc/andes/irq.hasm/hwcap.h
Detected Declarations
struct rintc_datafunction riscv_intc_irqfunction riscv_intc_aia_irqfunction SIEfunction riscv_intc_irq_unmaskfunction andes_intc_irq_maskfunction andes_intc_irq_unmaskfunction riscv_intc_irq_eoifunction riscv_intc_domain_mapfunction riscv_intc_domain_allocfunction riscv_intc_init_commonfunction riscv_intc_initfunction CPUfunction acpi_rintc_get_plic_nr_contextsfunction for_each_matching_plicfunction acpi_rintc_ext_parent_to_hartidfunction acpi_rintc_get_plic_contextfunction acpi_rintc_index_to_hartidfunction acpi_rintc_get_imsic_mmio_infofunction riscv_intc_acpi_matchfunction riscv_intc_acpi_init
Annotated Snippet
struct rintc_data {
union {
u32 ext_intc_id;
struct {
u32 context_id : 16,
reserved : 8,
aplic_plic_id : 8;
};
};
unsigned long hart_id;
u64 imsic_addr;
u32 imsic_size;
};
static u32 nr_rintc;
static struct rintc_data **rintc_acpi_data;
#define for_each_matching_plic(_plic_id) \
unsigned int _plic; \
\
for (_plic = 0; _plic < nr_rintc; _plic++) \
if (rintc_acpi_data[_plic]->aplic_plic_id != _plic_id) \
continue; \
else
unsigned int acpi_rintc_get_plic_nr_contexts(unsigned int plic_id)
{
unsigned int nctx = 0;
for_each_matching_plic(plic_id)
nctx++;
return nctx;
}
static struct rintc_data *get_plic_context(unsigned int plic_id, unsigned int ctxt_idx)
{
unsigned int ctxt = 0;
for_each_matching_plic(plic_id) {
if (ctxt == ctxt_idx)
return rintc_acpi_data[_plic];
ctxt++;
}
return NULL;
}
unsigned long acpi_rintc_ext_parent_to_hartid(unsigned int plic_id, unsigned int ctxt_idx)
{
struct rintc_data *data = get_plic_context(plic_id, ctxt_idx);
return data ? data->hart_id : INVALID_HARTID;
}
unsigned int acpi_rintc_get_plic_context(unsigned int plic_id, unsigned int ctxt_idx)
{
struct rintc_data *data = get_plic_context(plic_id, ctxt_idx);
return data ? data->context_id : INVALID_CONTEXT;
}
unsigned long acpi_rintc_index_to_hartid(u32 index)
{
return index >= nr_rintc ? INVALID_HARTID : rintc_acpi_data[index]->hart_id;
}
int acpi_rintc_get_imsic_mmio_info(u32 index, struct resource *res)
{
if (index >= nr_rintc)
return -1;
res->start = rintc_acpi_data[index]->imsic_addr;
res->end = res->start + rintc_acpi_data[index]->imsic_size - 1;
res->flags = IORESOURCE_MEM;
return 0;
}
static int __init riscv_intc_acpi_match(union acpi_subtable_headers *header,
const unsigned long end)
{
return 0;
}
static int __init riscv_intc_acpi_init(union acpi_subtable_headers *header,
const unsigned long end)
{
struct acpi_madt_rintc *rintc;
struct fwnode_handle *fn;
Annotation
- Immediate include surface: `linux/acpi.h`, `linux/atomic.h`, `linux/bits.h`, `linux/cpu.h`, `linux/irq.h`, `linux/irqchip.h`, `linux/irqdomain.h`, `linux/interrupt.h`.
- Detected declarations: `struct rintc_data`, `function riscv_intc_irq`, `function riscv_intc_aia_irq`, `function SIE`, `function riscv_intc_irq_unmask`, `function andes_intc_irq_mask`, `function andes_intc_irq_unmask`, `function riscv_intc_irq_eoi`, `function riscv_intc_domain_map`, `function riscv_intc_domain_alloc`.
- Atlas domain: Driver Families / drivers/irqchip.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.