drivers/irqchip/irq-sunxi-nmi.c

Source file repositories/reference/linux-study-clean/drivers/irqchip/irq-sunxi-nmi.c

File Facts

System
Linux kernel
Corpus path
drivers/irqchip/irq-sunxi-nmi.c
Extension
.c
Size
7112 bytes
Lines
251
Domain
Driver Families
Bucket
drivers/irqchip
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct sunxi_sc_nmi_data {
	struct {
		u32	ctrl;
		u32	pend;
		u32	enable;
	} reg_offs;
	u32		enable_val;
};

static const struct sunxi_sc_nmi_data sun6i_data __initconst = {
	.reg_offs.ctrl		= SUN6I_NMI_CTRL,
	.reg_offs.pend		= SUN6I_NMI_PENDING,
	.reg_offs.enable	= SUN6I_NMI_ENABLE,
};

static const struct sunxi_sc_nmi_data sun7i_data __initconst = {
	.reg_offs.ctrl		= SUN7I_NMI_CTRL,
	.reg_offs.pend		= SUN7I_NMI_PENDING,
	.reg_offs.enable	= SUN7I_NMI_ENABLE,
};

static const struct sunxi_sc_nmi_data sun9i_data __initconst = {
	.reg_offs.ctrl		= SUN9I_NMI_CTRL,
	.reg_offs.pend		= SUN9I_NMI_PENDING,
	.reg_offs.enable	= SUN9I_NMI_ENABLE,
};

static const struct sunxi_sc_nmi_data sun55i_a523_data __initconst = {
	.reg_offs.ctrl		= SUN9I_NMI_CTRL,
	.reg_offs.pend		= SUN9I_NMI_PENDING,
	.reg_offs.enable	= SUN9I_NMI_ENABLE,
	.enable_val		= BIT(31),
};

static inline void sunxi_sc_nmi_write(struct irq_chip_generic *gc, u32 off, u32 val)
{
	irq_reg_writel(gc, val, off);
}

static inline u32 sunxi_sc_nmi_read(struct irq_chip_generic *gc, u32 off)
{
	return irq_reg_readl(gc, off);
}

static void sunxi_sc_nmi_handle_irq(struct irq_desc *desc)
{
	struct irq_domain *domain = irq_desc_get_handler_data(desc);
	struct irq_chip *chip = irq_desc_get_chip(desc);

	chained_irq_enter(chip, desc);
	generic_handle_domain_irq(domain, 0);
	chained_irq_exit(chip, desc);
}

static int sunxi_sc_nmi_set_type(struct irq_data *data, unsigned int flow_type)
{
	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data);
	struct irq_chip_type *ct = gc->chip_types;
	u32 src_type_reg;
	u32 ctrl_off = ct->regs.type;
	unsigned int src_type;
	unsigned int i;

	guard(raw_spinlock)(&gc->lock);

	switch (flow_type & IRQF_TRIGGER_MASK) {
	case IRQ_TYPE_EDGE_FALLING:
		src_type = SUNXI_SRC_TYPE_EDGE_FALLING;
		break;
	case IRQ_TYPE_EDGE_RISING:
		src_type = SUNXI_SRC_TYPE_EDGE_RISING;
		break;
	case IRQ_TYPE_LEVEL_HIGH:
		src_type = SUNXI_SRC_TYPE_LEVEL_HIGH;
		break;
	case IRQ_TYPE_NONE:
	case IRQ_TYPE_LEVEL_LOW:
		src_type = SUNXI_SRC_TYPE_LEVEL_LOW;
		break;
	default:
		pr_err("Cannot assign multiple trigger modes to IRQ %d.\n", data->irq);
		return -EBADR;
	}

	irqd_set_trigger_type(data, flow_type);
	irq_setup_alt_chip(data, flow_type);

	for (i = 0; i < gc->num_ct; i++, ct++)
		if (ct->type & flow_type)
			ctrl_off = ct->regs.type;

Annotation

Implementation Notes