drivers/irqchip/irq-xtensa-mx.c
Source file repositories/reference/linux-study-clean/drivers/irqchip/irq-xtensa-mx.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/irqchip/irq-xtensa-mx.c- Extension
.c- Size
- 4891 bytes
- Lines
- 186
- Domain
- Driver Families
- Bucket
- drivers/irqchip
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/interrupt.hlinux/irqdomain.hlinux/irq.hlinux/irqchip.hlinux/irqchip/xtensa-mx.hlinux/of.hasm/mxregs.h
Detected Declarations
function xtensa_mx_irq_mapfunction externalfunction secondary_init_irqfunction xtensa_mx_irq_maskfunction xtensa_mx_irq_unmaskfunction xtensa_mx_irq_enablefunction xtensa_mx_irq_disablefunction xtensa_mx_irq_ackfunction xtensa_mx_irq_retriggerfunction xtensa_mx_irq_set_affinityfunction xtensa_mx_init_commonfunction xtensa_mx_init_legacyfunction xtensa_mx_init
Annotated Snippet
if (ext_irq >= HW_IRQ_MX_BASE) {
set_er(1u << (ext_irq - HW_IRQ_MX_BASE), MIENG);
return;
}
}
mask = __this_cpu_read(cached_irq_mask) & ~mask;
__this_cpu_write(cached_irq_mask, mask);
xtensa_set_sr(mask, intenable);
}
static void xtensa_mx_irq_unmask(struct irq_data *d)
{
unsigned int mask = 1u << d->hwirq;
if (mask & (XCHAL_INTTYPE_MASK_EXTERN_EDGE |
XCHAL_INTTYPE_MASK_EXTERN_LEVEL)) {
unsigned int ext_irq = xtensa_get_ext_irq_no(d->hwirq);
if (ext_irq >= HW_IRQ_MX_BASE) {
set_er(1u << (ext_irq - HW_IRQ_MX_BASE), MIENGSET);
return;
}
}
mask |= __this_cpu_read(cached_irq_mask);
__this_cpu_write(cached_irq_mask, mask);
xtensa_set_sr(mask, intenable);
}
static void xtensa_mx_irq_enable(struct irq_data *d)
{
xtensa_mx_irq_unmask(d);
}
static void xtensa_mx_irq_disable(struct irq_data *d)
{
xtensa_mx_irq_mask(d);
}
static void xtensa_mx_irq_ack(struct irq_data *d)
{
xtensa_set_sr(1 << d->hwirq, intclear);
}
static int xtensa_mx_irq_retrigger(struct irq_data *d)
{
unsigned int mask = 1u << d->hwirq;
if (WARN_ON(mask & ~XCHAL_INTTYPE_MASK_SOFTWARE))
return 0;
xtensa_set_sr(mask, intset);
return 1;
}
static int xtensa_mx_irq_set_affinity(struct irq_data *d,
const struct cpumask *dest, bool force)
{
int cpu = cpumask_any_and(dest, cpu_online_mask);
unsigned mask = 1u << cpu;
set_er(mask, MIROUT(d->hwirq - HW_IRQ_MX_BASE));
irq_data_update_effective_affinity(d, cpumask_of(cpu));
return 0;
}
static struct irq_chip xtensa_mx_irq_chip = {
.name = "xtensa-mx",
.irq_enable = xtensa_mx_irq_enable,
.irq_disable = xtensa_mx_irq_disable,
.irq_mask = xtensa_mx_irq_mask,
.irq_unmask = xtensa_mx_irq_unmask,
.irq_ack = xtensa_mx_irq_ack,
.irq_retrigger = xtensa_mx_irq_retrigger,
.irq_set_affinity = xtensa_mx_irq_set_affinity,
};
static void __init xtensa_mx_init_common(struct irq_domain *root_domain)
{
unsigned int i;
irq_set_default_domain(root_domain);
secondary_init_irq();
/* Initialize default IRQ routing to CPU 0 */
for (i = 0; i < XCHAL_NUM_EXTINTERRUPTS; ++i)
set_er(1, MIROUT(i));
}
int __init xtensa_mx_init_legacy(struct device_node *interrupt_parent)
Annotation
- Immediate include surface: `linux/interrupt.h`, `linux/irqdomain.h`, `linux/irq.h`, `linux/irqchip.h`, `linux/irqchip/xtensa-mx.h`, `linux/of.h`, `asm/mxregs.h`.
- Detected declarations: `function xtensa_mx_irq_map`, `function external`, `function secondary_init_irq`, `function xtensa_mx_irq_mask`, `function xtensa_mx_irq_unmask`, `function xtensa_mx_irq_enable`, `function xtensa_mx_irq_disable`, `function xtensa_mx_irq_ack`, `function xtensa_mx_irq_retrigger`, `function xtensa_mx_irq_set_affinity`.
- Atlas domain: Driver Families / drivers/irqchip.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.