drivers/mailbox/arm_mhuv2.c

Source file repositories/reference/linux-study-clean/drivers/mailbox/arm_mhuv2.c

File Facts

System
Linux kernel
Corpus path
drivers/mailbox/arm_mhuv2.c
Extension
.c
Size
30187 bytes
Lines
1139
Domain
Driver Families
Bucket
drivers/mailbox
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct mhu_cfg_t {
	u32 num_ch : 7;
	u32 pad : 25;
} __packed;

/* register Interrupt Status fields */
struct int_st_t {
	u32 nr2r : 1;
	u32 r2nr : 1;
	u32 pad : 30;
} __packed;

/* Register Interrupt Clear fields */
struct int_clr_t {
	u32 nr2r : 1;
	u32 r2nr : 1;
	u32 pad : 30;
} __packed;

/* Register Interrupt Enable fields */
struct int_en_t {
	u32 r2nr : 1;
	u32 nr2r : 1;
	u32 chcomb : 1;
	u32 pad : 29;
} __packed;

/* Register Implementer Identification fields */
struct iidr_t {
	u32 implementer : 12;
	u32 revision : 4;
	u32 variant : 4;
	u32 product_id : 12;
} __packed;

/* Register Architecture Identification Register fields */
struct aidr_t {
	u32 arch_minor_rev : 4;
	u32 arch_major_rev : 4;
	u32 pad : 24;
} __packed;

/* Sender Channel Window fields */
struct mhu2_send_ch_wn_reg {
	u32 stat;
	u8 pad1[0x0C - 0x04];
	u32 stat_set;
	u32 int_st;
	u32 int_clr;
	u32 int_en;
	u8 pad2[0x20 - 0x1C];
} __packed;

/* Sender frame register fields */
struct mhu2_send_frame_reg {
	struct mhu2_send_ch_wn_reg ch_wn[MHUV2_CH_WN_MAX];
	struct mhu_cfg_t mhu_cfg;
	u32 resp_cfg;
	u32 access_request;
	u32 access_ready;
	struct int_st_t int_st;
	struct int_clr_t int_clr;
	struct int_en_t int_en;
	u32 reserved0;
	u32 chcomb_int_st[MHUV2_CMB_INT_ST_REG_CNT];
	u8 pad[0xFC8 - 0xFB0];
	struct iidr_t iidr;
	struct aidr_t aidr;
} __packed;

/* Receiver Channel Window fields */
struct mhu2_recv_ch_wn_reg {
	u32 stat;
	u32 stat_masked;
	u32 stat_clear;
	u8 reserved0[0x10 - 0x0C];
	u32 mask;
	u32 mask_set;
	u32 mask_clear;
	u8 pad[0x20 - 0x1C];
} __packed;

/* Receiver frame register fields */
struct mhu2_recv_frame_reg {
	struct mhu2_recv_ch_wn_reg ch_wn[MHUV2_CH_WN_MAX];
	struct mhu_cfg_t mhu_cfg;
	u8 reserved0[0xF90 - 0xF84];
	struct int_st_t int_st;
	struct int_clr_t int_clr;
	struct int_en_t int_en;

Annotation

Implementation Notes