drivers/mailbox/cv1800-mailbox.c
Source file repositories/reference/linux-study-clean/drivers/mailbox/cv1800-mailbox.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/mailbox/cv1800-mailbox.c- Extension
.c- Size
- 5439 bytes
- Lines
- 220
- Domain
- Driver Families
- Bucket
- drivers/mailbox
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bits.hlinux/device.hlinux/err.hlinux/interrupt.hlinux/io.hlinux/kfifo.hlinux/mailbox_controller.hlinux/module.hlinux/platform_device.hlinux/slab.h
Detected Declarations
struct cv1800_mbox_chan_privstruct cv1800_mboxfunction cv1800_mbox_isrfunction cv1800_mbox_irqfunction cv1800_mbox_send_datafunction cv1800_last_tx_donefunction cv1800_mbox_probe
Annotated Snippet
struct cv1800_mbox_chan_priv {
int idx;
int cpu;
};
struct cv1800_mbox {
struct mbox_controller mbox;
struct cv1800_mbox_chan_priv priv[MAILBOX_MAX_CHAN];
struct mbox_chan chans[MAILBOX_MAX_CHAN];
u64 __iomem *content[MAILBOX_MAX_CHAN];
void __iomem *mbox_base;
int recvid;
};
static irqreturn_t cv1800_mbox_isr(int irq, void *dev_id)
{
struct cv1800_mbox *mbox = (struct cv1800_mbox *)dev_id;
size_t i;
u64 msg;
int ret = IRQ_NONE;
for (i = 0; i < MAILBOX_MAX_CHAN; i++) {
if (mbox->content[i] && mbox->chans[i].cl) {
memcpy_fromio(&msg, mbox->content[i], MAILBOX_MSG_LEN);
mbox->content[i] = NULL;
mbox_chan_received_data(&mbox->chans[i], (void *)&msg);
ret = IRQ_HANDLED;
}
}
return ret;
}
static irqreturn_t cv1800_mbox_irq(int irq, void *dev_id)
{
struct cv1800_mbox *mbox = (struct cv1800_mbox *)dev_id;
u8 set, valid;
size_t i;
int ret = IRQ_NONE;
set = readb(mbox->mbox_base + MBOX_SET_INT_REG(RECV_CPU));
if (!set)
return ret;
for (i = 0; i < MAILBOX_MAX_CHAN; i++) {
valid = set & BIT(i);
if (valid) {
mbox->content[i] =
MBOX_CONTEXT_BASE_INDEX(mbox->mbox_base, i);
writeb(valid, mbox->mbox_base +
MBOX_SET_CLR_REG(RECV_CPU));
writeb(~valid, mbox->mbox_base + MBOX_EN_REG(RECV_CPU));
ret = IRQ_WAKE_THREAD;
}
}
return ret;
}
static int cv1800_mbox_send_data(struct mbox_chan *chan, void *data)
{
struct cv1800_mbox_chan_priv *priv =
(struct cv1800_mbox_chan_priv *)chan->con_priv;
struct cv1800_mbox *mbox = dev_get_drvdata(chan->mbox->dev);
int idx = priv->idx;
int cpu = priv->cpu;
u8 en, valid;
memcpy_toio(MBOX_CONTEXT_BASE_INDEX(mbox->mbox_base, idx),
data, MAILBOX_MSG_LEN);
valid = BIT(idx);
writeb(valid, mbox->mbox_base + MBOX_SET_CLR_REG(cpu));
en = readb(mbox->mbox_base + MBOX_EN_REG(cpu));
writeb(en | valid, mbox->mbox_base + MBOX_EN_REG(cpu));
writeb(valid, mbox->mbox_base + MBOX_SET_REG);
return 0;
}
static bool cv1800_last_tx_done(struct mbox_chan *chan)
{
struct cv1800_mbox_chan_priv *priv =
(struct cv1800_mbox_chan_priv *)chan->con_priv;
struct cv1800_mbox *mbox = dev_get_drvdata(chan->mbox->dev);
u8 en;
en = readb(mbox->mbox_base + MBOX_EN_REG(priv->cpu));
Annotation
- Immediate include surface: `linux/bits.h`, `linux/device.h`, `linux/err.h`, `linux/interrupt.h`, `linux/io.h`, `linux/kfifo.h`, `linux/mailbox_controller.h`, `linux/module.h`.
- Detected declarations: `struct cv1800_mbox_chan_priv`, `struct cv1800_mbox`, `function cv1800_mbox_isr`, `function cv1800_mbox_irq`, `function cv1800_mbox_send_data`, `function cv1800_last_tx_done`, `function cv1800_mbox_probe`.
- Atlas domain: Driver Families / drivers/mailbox.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.