drivers/mailbox/tegra-hsp.c

File Facts

System

Linux kernel

Corpus path

drivers/mailbox/tegra-hsp.c

Extension

.c

Size

24764 bytes

Lines

1010

Domain

Driver Families

Bucket

drivers/mailbox

Inferred role

Driver Families: exported/initcall integration point

Status

integration implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
• Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
• Touches IRQ or DMA behavior; this matters for the representative real-device path.
• Allocates kernel memory; connect allocation flags and lifetime to context constraints.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• linux/delay.h
• linux/interrupt.h
• linux/io.h
• linux/mailbox_controller.h
• linux/of.h
• linux/platform_device.h
• linux/pm.h
• linux/slab.h
• soc/tegra/fuse.h
• dt-bindings/mailbox/tegra186-hsp.h

Detected Declarations

• struct tegra_hsp_channel
• struct tegra_hsp
• struct tegra_hsp_channel
• struct tegra_hsp_doorbell
• struct tegra_hsp_sm_ops
• struct tegra_hsp_mailbox
• struct tegra_hsp_db_map
• struct tegra_hsp_soc
• struct tegra_hsp
• function tegra_hsp_readl
• function tegra_hsp_writel
• function tegra_hsp_channel_readl
• function tegra_hsp_channel_writel
• function tegra_hsp_doorbell_can_ring
• function __tegra_hsp_doorbell_get
• function tegra_hsp_doorbell_get
• function tegra_hsp_doorbell_irq
• function for_each_set_bit
• function tegra_hsp_shared_irq
• function for_each_set_bit
• function for_each_set_bit
• function tegra_hsp_doorbell_create
• function tegra_hsp_doorbell_send_data
• function tegra_hsp_doorbell_startup
• function tegra_hsp_doorbell_shutdown
• function tegra_hsp_sm_send32
• function tegra_hsp_sm_recv32
• function tegra_hsp_sm_send128
• function tegra_hsp_sm_recv128
• function tegra_hsp_mailbox_send_data
• function tegra_hsp_mailbox_flush
• function tegra_hsp_mailbox_startup
• function tegra_hsp_mailbox_shutdown
• function tegra_hsp_add_doorbells
• function tegra_hsp_add_mailboxes
• function tegra_hsp_request_shared_irq
• function tegra_hsp_probe
• function tegra_hsp_remove
• function tegra_hsp_resume
• function list_for_each_entry
• function tegra_hsp_init
• module init tegra_hsp_init

Annotated Snippet

core_initcall(tegra_hsp_init);

Annotation

• Immediate include surface: `linux/delay.h`, `linux/interrupt.h`, `linux/io.h`, `linux/mailbox_controller.h`, `linux/of.h`, `linux/platform_device.h`, `linux/pm.h`, `linux/slab.h`.
• Detected declarations: `struct tegra_hsp_channel`, `struct tegra_hsp`, `struct tegra_hsp_channel`, `struct tegra_hsp_doorbell`, `struct tegra_hsp_sm_ops`, `struct tegra_hsp_mailbox`, `struct tegra_hsp_db_map`, `struct tegra_hsp_soc`, `struct tegra_hsp`, `function tegra_hsp_readl`.
• Atlas domain: Driver Families / drivers/mailbox.
• Implementation status: integration implementation candidate.
• Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
• IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.