drivers/mcb/mcb-internal.h
Source file repositories/reference/linux-study-clean/drivers/mcb/mcb-internal.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/mcb/mcb-internal.h- Extension
.h- Size
- 3329 bytes
- Lines
- 129
- Domain
- Driver Families
- Bucket
- drivers/mcb
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/types.h
Detected Declarations
struct chameleon_fpga_headerstruct chameleon_gddstruct chameleon_bddstruct chameleon_barenum chameleon_descriptor_typeenum chameleon_bus_type
Annotated Snippet
struct chameleon_fpga_header {
u8 revision;
char model;
u8 minor;
u8 bus_type;
u16 magic;
u16 reserved;
/* This one has no '\0' at the end!!! */
char filename[CHAMELEON_FILENAME_LEN];
} __packed;
#define HEADER_MAGIC_OFFSET 0x4
/**
* struct chameleon_gdd - Chameleon General Device Descriptor
*
* @irq: the position in the FPGA's IRQ controller vector
* @rev: the revision of the variant's implementation
* @var: the variant of the IP core
* @dev: the device the IP core is
* @dtype: device descriptor type
* @bar: BAR offset that must be added to module offset
* @inst: the instance number of the device, 0 is first instance
* @group: the group the device belongs to (0 = no group)
* @reserved: reserved
* @offset: beginning of the address window of desired module
* @size: size of the module's address window
*/
struct chameleon_gdd {
__le32 reg1;
__le32 reg2;
__le32 offset;
__le32 size;
} __packed;
/* GDD Register 1 fields */
#define GDD_IRQ(x) ((x) & 0x1f)
#define GDD_REV(x) (((x) >> 5) & 0x3f)
#define GDD_VAR(x) (((x) >> 11) & 0x3f)
#define GDD_DEV(x) (((x) >> 18) & 0x3ff)
#define GDD_DTY(x) (((x) >> 28) & 0xf)
/* GDD Register 2 fields */
#define GDD_BAR(x) ((x) & 0x7)
#define GDD_INS(x) (((x) >> 3) & 0x3f)
#define GDD_GRP(x) (((x) >> 9) & 0x3f)
/**
* struct chameleon_bdd - Chameleon Bridge Device Descriptor
*
* @irq: the position in the FPGA's IRQ controller vector
* @rev: the revision of the variant's implementation
* @var: the variant of the IP core
* @dev: the device the IP core is
* @dtype: device descriptor type
* @bar: BAR offset that must be added to module offset
* @inst: the instance number of the device, 0 is first instance
* @dbar: destination bar from the bus _behind_ the bridge
* @chamoff: offset within the BAR of the source bus
* @offset:
* @size:
*/
struct chameleon_bdd {
unsigned int irq:6;
unsigned int rev:6;
unsigned int var:6;
unsigned int dev:10;
unsigned int dtype:4;
unsigned int bar:3;
unsigned int inst:6;
unsigned int dbar:3;
unsigned int group:6;
unsigned int reserved:14;
u32 chamoff;
u32 offset;
u32 size;
} __packed;
struct chameleon_bar {
u32 addr;
u32 size;
};
#define BAR_CNT(x) ((x) & 0x07)
#define CHAMELEON_BAR_MAX 6
#define BAR_DESC_SIZE(x) ((x) * sizeof(struct chameleon_bar) + sizeof(__le32))
int chameleon_parse_cells(struct mcb_bus *bus, phys_addr_t mapbase,
void __iomem *base);
Annotation
- Immediate include surface: `linux/types.h`.
- Detected declarations: `struct chameleon_fpga_header`, `struct chameleon_gdd`, `struct chameleon_bdd`, `struct chameleon_bar`, `enum chameleon_descriptor_type`, `enum chameleon_bus_type`.
- Atlas domain: Driver Families / drivers/mcb.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.