drivers/media/common/b2c2/flexcop-sram.c
Source file repositories/reference/linux-study-clean/drivers/media/common/b2c2/flexcop-sram.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/media/common/b2c2/flexcop-sram.c- Extension
.c- Size
- 8722 bytes
- Lines
- 365
- Domain
- Driver Families
- Bucket
- drivers/media
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
flexcop.h
Detected Declarations
function FlexcopIIfunction flexcop_sram_initfunction flexcop_sram_set_destfunction flexcop_wan_set_speedfunction flexcop_sram_ctrlfunction flexcop_sram_writefunction flex_sram_readfunction sram_write_chunkfunction sram_read_chunkfunction sram_readfunction sram_writefunction sram_set_sizefunction sram_initfunction sram_test_locationfunction sram_lengthfunction flexcop_sram_detectfunction sll_detect_sram_sizeexport flexcop_sram_set_destexport flexcop_wan_set_speedexport flexcop_sram_ctrl
Annotated Snippet
while (((read_reg_dw(adapter, 0x700) & 0x80000000) != 0) && (retries > 0)) {
mdelay(1);
retries--;
}
if (retries == 0)
printk("%s: SRAM timeout\n", __func__);
write_reg_dw(adapter, 0x700, command);
buf++;
addr++;
}
}
static void flex_sram_read(struct adapter *adapter, u32 bank, u32 addr, u8 *buf, u32 len)
{
int i, retries;
u32 command, value;
for (i = 0; i < len; i++) {
command = bank | addr | 0x04008000;
retries = 10000;
while (((read_reg_dw(adapter, 0x700) & 0x80000000) != 0) && (retries > 0)) {
mdelay(1);
retries--;
}
if (retries == 0)
printk("%s: SRAM timeout\n", __func__);
write_reg_dw(adapter, 0x700, command);
retries = 10000;
while (((read_reg_dw(adapter, 0x700) & 0x80000000) != 0) && (retries > 0)) {
mdelay(1);
retries--;
}
if (retries == 0)
printk("%s: SRAM timeout\n", __func__);
value = read_reg_dw(adapter, 0x700) >> 0x10;
*buf = (value & 0xff);
addr++;
buf++;
}
}
static void sram_write_chunk(struct adapter *adapter, u32 addr, u8 *buf, u16 len)
{
u32 bank;
bank = 0;
if (adapter->dw_sram_type == 0x20000) {
bank = (addr & 0x18000) << 0x0d;
}
if (adapter->dw_sram_type == 0x00000) {
if ((addr >> 0x0f) == 0)
bank = 0x20000000;
else
bank = 0x10000000;
}
flex_sram_write(adapter, bank, addr & 0x7fff, buf, len);
}
static void sram_read_chunk(struct adapter *adapter, u32 addr, u8 *buf, u16 len)
{
u32 bank;
bank = 0;
if (adapter->dw_sram_type == 0x20000) {
bank = (addr & 0x18000) << 0x0d;
}
if (adapter->dw_sram_type == 0x00000) {
if ((addr >> 0x0f) == 0)
bank = 0x20000000;
else
bank = 0x10000000;
}
flex_sram_read(adapter, bank, addr & 0x7fff, buf, len);
}
Annotation
- Immediate include surface: `flexcop.h`.
- Detected declarations: `function FlexcopII`, `function flexcop_sram_init`, `function flexcop_sram_set_dest`, `function flexcop_wan_set_speed`, `function flexcop_sram_ctrl`, `function flexcop_sram_write`, `function flex_sram_read`, `function sram_write_chunk`, `function sram_read_chunk`, `function sram_read`.
- Atlas domain: Driver Families / drivers/media.
- Implementation status: integration implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.