drivers/media/dvb-frontends/cx24110.c

Source file repositories/reference/linux-study-clean/drivers/media/dvb-frontends/cx24110.c

File Facts

System
Linux kernel
Corpus path
drivers/media/dvb-frontends/cx24110.c
Extension
.c
Size
20273 bytes
Lines
657
Domain
Driver Families
Bucket
drivers/media
Inferred role
Driver Families: exported/initcall integration point
Status
integration implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct cx24110_state {

	struct i2c_adapter* i2c;

	const struct cx24110_config* config;

	struct dvb_frontend frontend;

	u32 lastber;
	u32 lastbler;
	u32 lastesn0;
};

static int debug;
#define dprintk(args...) \
	do { \
		if (debug) printk(KERN_DEBUG "cx24110: " args); \
	} while (0)

static struct {u8 reg; u8 data;} cx24110_regdata[]=
		      /* Comments beginning with @ denote this value should
			 be the default */
	{{0x09,0x01}, /* SoftResetAll */
	 {0x09,0x00}, /* release reset */
	 {0x01,0xe8}, /* MSB of code rate 27.5MS/s */
	 {0x02,0x17}, /* middle byte " */
	 {0x03,0x29}, /* LSB         " */
	 {0x05,0x03}, /* @ DVB mode, standard code rate 3/4 */
	 {0x06,0xa5}, /* @ PLL 60MHz */
	 {0x07,0x01}, /* @ Fclk, i.e. sampling clock, 60MHz */
	 {0x0a,0x00}, /* @ partial chip disables, do not set */
	 {0x0b,0x01}, /* set output clock in gapped mode, start signal low
			 active for first byte */
	 {0x0c,0x11}, /* no parity bytes, large hold time, serial data out */
	 {0x0d,0x6f}, /* @ RS Sync/Unsync thresholds */
	 {0x10,0x40}, /* chip doc is misleading here: write bit 6 as 1
			 to avoid starting the BER counter. Reset the
			 CRC test bit. Finite counting selected */
	 {0x15,0xff}, /* @ size of the limited time window for RS BER
			 estimation. It is <value>*256 RS blocks, this
			 gives approx. 2.6 sec at 27.5MS/s, rate 3/4 */
	 {0x16,0x00}, /* @ enable all RS output ports */
	 {0x17,0x04}, /* @ time window allowed for the RS to sync */
	 {0x18,0xae}, /* @ allow all standard DVB code rates to be scanned
			 for automatically */
		      /* leave the current code rate and normalization
			 registers as they are after reset... */
	 {0x21,0x10}, /* @ during AutoAcq, search each viterbi setting
			 only once */
	 {0x23,0x18}, /* @ size of the limited time window for Viterbi BER
			 estimation. It is <value>*65536 channel bits, i.e.
			 approx. 38ms at 27.5MS/s, rate 3/4 */
	 {0x24,0x24}, /* do not trigger Viterbi CRC test. Finite count window */
		      /* leave front-end AGC parameters at default values */
		      /* leave decimation AGC parameters at default values */
	 {0x35,0x40}, /* disable all interrupts. They are not connected anyway */
	 {0x36,0xff}, /* clear all interrupt pending flags */
	 {0x37,0x00}, /* @ fully enable AutoAcqq state machine */
	 {0x38,0x07}, /* @ enable fade recovery, but not autostart AutoAcq */
		      /* leave the equalizer parameters on their default values */
		      /* leave the final AGC parameters on their default values */
	 {0x41,0x00}, /* @ MSB of front-end derotator frequency */
	 {0x42,0x00}, /* @ middle bytes " */
	 {0x43,0x00}, /* @ LSB          " */
		      /* leave the carrier tracking loop parameters on default */
		      /* leave the bit timing loop parameters at default */
	 {0x56,0x4d}, /* set the filtune voltage to 2.7V, as recommended by */
		      /* the cx24108 data sheet for symbol rates above 15MS/s */
	 {0x57,0x00}, /* @ Filter sigma delta enabled, positive */
	 {0x61,0x95}, /* GPIO pins 1-4 have special function */
	 {0x62,0x05}, /* GPIO pin 5 has special function, pin 6 is GPIO */
	 {0x63,0x00}, /* All GPIO pins use CMOS output characteristics */
	 {0x64,0x20}, /* GPIO 6 is input, all others are outputs */
	 {0x6d,0x30}, /* tuner auto mode clock freq 62kHz */
	 {0x70,0x15}, /* use auto mode, tuner word is 21 bits long */
	 {0x73,0x00}, /* @ disable several demod bypasses */
	 {0x74,0x00}, /* @  " */
	 {0x75,0x00}  /* @  " */
		      /* the remaining registers are for SEC */
	};


static int cx24110_writereg (struct cx24110_state* state, int reg, int data)
{
	u8 buf [] = { reg, data };
	struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 };
	int err;

	if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
		dprintk("%s: writereg error (err == %i, reg == 0x%02x, data == 0x%02x)\n",

Annotation

Implementation Notes