drivers/media/dvb-frontends/drxk_hard.h

Source file repositories/reference/linux-study-clean/drivers/media/dvb-frontends/drxk_hard.h

File Facts

System
Linux kernel
Corpus path
drivers/media/dvb-frontends/drxk_hard.h
Extension
.h
Size
11304 bytes
Lines
369
Domain
Driver Families
Bucket
drivers/media
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct drxk_cfg_dvbt_echo_thres_t {
	u16             threshold;
	enum drx_fftmode_t      fft_mode;
} ;

struct s_cfg_agc {
	enum agc_ctrl_mode     ctrl_mode;        /* off, user, auto */
	u16            output_level;     /* range dependent on AGC */
	u16            min_output_level;  /* range dependent on AGC */
	u16            max_output_level;  /* range dependent on AGC */
	u16            speed;           /* range dependent on AGC */
	u16            top;             /* rf-agc take over point */
	u16            cut_off_current;   /* rf-agc is accelerated if output current
					   is below cut-off current */
	u16            ingain_tgt_max;
	u16            fast_clip_ctrl_delay;
};

struct s_cfg_pre_saw {
	u16        reference; /* pre SAW reference value, range 0 .. 31 */
	bool          use_pre_saw; /* TRUE algorithms must use pre SAW sense */
};

struct drxk_ofdm_sc_cmd_t {
	u16 cmd;        /* Command number */
	u16 subcmd;     /* Sub-command parameter*/
	u16 param0;     /* General purpous param */
	u16 param1;     /* General purpous param */
	u16 param2;     /* General purpous param */
	u16 param3;     /* General purpous param */
	u16 param4;     /* General purpous param */
};

struct drxk_state {
	struct dvb_frontend frontend;
	struct dtv_frontend_properties props;
	struct device *dev;

	struct i2c_adapter *i2c;
	u8     demod_address;
	void  *priv;

	struct mutex mutex;

	u32    m_instance;           /* Channel 1,2,3 or 4 */

	int    m_chunk_size;
	u8 chunk[256];

	bool   m_has_lna;
	bool   m_has_dvbt;
	bool   m_has_dvbc;
	bool   m_has_audio;
	bool   m_has_atv;
	bool   m_has_oob;
	bool   m_has_sawsw;         /* TRUE if mat_tx is available */
	bool   m_has_gpio1;         /* TRUE if mat_rx is available */
	bool   m_has_gpio2;         /* TRUE if GPIO is available */
	bool   m_has_irqn;          /* TRUE if IRQN is available */
	u16    m_osc_clock_freq;
	u16    m_hi_cfg_timing_div;
	u16    m_hi_cfg_bridge_delay;
	u16    m_hi_cfg_wake_up_key;
	u16    m_hi_cfg_timeout;
	u16    m_hi_cfg_ctrl;
	s32    m_sys_clock_freq;      /* system clock frequency in kHz */

	enum e_drxk_state    m_drxk_state;      /* State of Drxk (init,stopped,started) */
	enum operation_mode m_operation_mode;  /* digital standards */
	struct s_cfg_agc     m_vsb_rf_agc_cfg;    /* settings for VSB RF-AGC */
	struct s_cfg_agc     m_vsb_if_agc_cfg;    /* settings for VSB IF-AGC */
	u16                m_vsb_pga_cfg;      /* settings for VSB PGA */
	struct s_cfg_pre_saw  m_vsb_pre_saw_cfg;   /* settings for pre SAW sense */
	s32    m_Quality83percent;  /* MER level (*0.1 dB) for 83% quality indication */
	s32    m_Quality93percent;  /* MER level (*0.1 dB) for 93% quality indication */
	bool   m_smart_ant_inverted;
	bool   m_b_debug_enable_bridge;
	bool   m_b_p_down_open_bridge;  /* only open DRXK bridge before power-down once it has been accessed */
	bool   m_b_power_down;        /* Power down when not used */

	u32    m_iqm_fs_rate_ofs;      /* frequency shift as written to DRXK register (28bit fixpoint) */

	bool   m_enable_mpeg_output;  /* If TRUE, enable MPEG output */
	bool   m_insert_rs_byte;      /* If TRUE, insert RS byte */
	bool   m_enable_parallel;    /* If TRUE, parallel out otherwise serial */
	bool   m_invert_data;        /* If TRUE, invert DATA signals */
	bool   m_invert_err;         /* If TRUE, invert ERR signal */
	bool   m_invert_str;         /* If TRUE, invert STR signals */
	bool   m_invert_val;         /* If TRUE, invert VAL signals */
	bool   m_invert_clk;         /* If TRUE, invert CLK signals */

Annotation

Implementation Notes