drivers/media/dvb-frontends/lgs8gxx_priv.h

File Facts

System

Linux kernel

Corpus path

drivers/media/dvb-frontends/lgs8gxx_priv.h

Extension

.h

Size

1899 bytes

Lines

57

Domain

Driver Families

Bucket

drivers/media

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• struct lgs8gxx_state

Annotated Snippet

struct lgs8gxx_state {
	struct i2c_adapter *i2c;
	/* configuration settings */
	const struct lgs8gxx_config *config;
	struct dvb_frontend frontend;
	u16 curr_gi; /* current guard interval */
};

#define SC_MASK		0x1C	/* Sub-Carrier Modulation Mask */
#define SC_QAM64	0x10	/* 64QAM modulation */
#define SC_QAM32	0x0C	/* 32QAM modulation */
#define SC_QAM16	0x08	/* 16QAM modulation */
#define SC_QAM4NR	0x04	/* 4QAM-NR modulation */
#define SC_QAM4		0x00	/* 4QAM modulation */

#define LGS_FEC_MASK	0x03	/* FEC Rate Mask */
#define LGS_FEC_0_4	0x00	/* FEC Rate 0.4 */
#define LGS_FEC_0_6	0x01	/* FEC Rate 0.6 */
#define LGS_FEC_0_8	0x02	/* FEC Rate 0.8 */

#define TIM_MASK	  0x20	/* Time Interleave Length Mask */
#define TIM_LONG	  0x20	/* Time Interleave Length = 720 */
#define TIM_MIDDLE     0x00   /* Time Interleave Length = 240 */

#define CF_MASK	0x80	/* Control Frame Mask */
#define CF_EN	0x80	/* Control Frame On */

#define GI_MASK	0x03	/* Guard Interval Mask */
#define GI_420	0x00	/* 1/9 Guard Interval */
#define GI_595	0x01	/* */
#define GI_945	0x02	/* 1/4 Guard Interval */


#define TS_PARALLEL	0x00	/* Parallel TS Output a.k.a. SPI */
#define TS_SERIAL	0x01	/* Serial TS Output a.k.a. SSI */
#define TS_CLK_NORMAL		0x00	/* MPEG Clock Normal */
#define TS_CLK_INVERTED		0x02	/* MPEG Clock Inverted */
#define TS_CLK_GATED		0x00	/* MPEG clock gated */
#define TS_CLK_FREERUN		0x04	/* MPEG clock free running*/


#endif

Annotation

• Detected declarations: `struct lgs8gxx_state`.
• Atlas domain: Driver Families / drivers/media.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.