drivers/media/dvb-frontends/mb86a16_priv.h
Source file repositories/reference/linux-study-clean/drivers/media/dvb-frontends/mb86a16_priv.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/media/dvb-frontends/mb86a16_priv.h- Extension
.h- Size
- 3734 bytes
- Lines
- 140
- Domain
- Driver Families
- Bucket
- drivers/media
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
Fujitsu MB86A16 DVB-S/DSS DC Receiver driver
Copyright (C) Manu Abraham (abraham.manu@gmail.com)
*/
#ifndef __MB86A16_PRIV_H
#define __MB86A16_PRIV_H
#define MB86A16_TSOUT 0x00
#define MB86A16_TSOUT_HIZSEL (0x01 << 5)
#define MB86A16_TSOUT_HIZCNTI (0x01 << 4)
#define MB86A16_TSOUT_MODE (0x01 << 3)
#define MB86A16_TSOUT_ORDER (0x01 << 2)
#define MB86A16_TSOUT_ERROR (0x01 << 1)
#define Mb86A16_TSOUT_EDGE (0x01 << 0)
#define MB86A16_FEC 0x01
#define MB86A16_FEC_FSYNC (0x01 << 5)
#define MB86A16_FEC_PCKB8 (0x01 << 4)
#define MB86A16_FEC_DVDS (0x01 << 3)
#define MB86A16_FEC_EREN (0x01 << 2)
#define Mb86A16_FEC_RSEN (0x01 << 1)
#define MB86A16_FEC_DIEN (0x01 << 0)
#define MB86A16_AGC 0x02
#define MB86A16_AGC_AGMD (0x01 << 6)
#define MB86A16_AGC_AGCW (0x0f << 2)
#define MB86A16_AGC_AGCP (0x01 << 1)
#define MB86A16_AGC_AGCR (0x01 << 0)
#define MB86A16_SRATE1 0x03
#define MB86A16_SRATE1_DECI (0x07 << 2)
#define MB86A16_SRATE1_CSEL (0x01 << 1)
#define MB86A16_SRATE1_RSEL (0x01 << 0)
#define MB86A16_SRATE2 0x04
#define MB86A16_SRATE2_STOFSL (0xff << 0)
#define MB86A16_SRATE3 0x05
#define MB86A16_SRATE2_STOFSH (0xff << 0)
#define MB86A16_VITERBI 0x06
#define MB86A16_FRAMESYNC 0x07
#define MB86A16_CRLFILTCOEF1 0x08
#define MB86A16_CRLFILTCOEF2 0x09
#define MB86A16_STRFILTCOEF1 0x0a
#define MB86A16_STRFILTCOEF2 0x0b
#define MB86A16_RESET 0x0c
#define MB86A16_STATUS 0x0d
#define MB86A16_AFCML 0x0e
#define MB86A16_AFCMH 0x0f
#define MB86A16_BERMON 0x10
#define MB86A16_BERTAB 0x11
#define MB86A16_BERLSB 0x12
#define MB86A16_BERMID 0x13
#define MB86A16_BERMSB 0x14
#define MB86A16_AGCM 0x15
#define MB86A16_DCC1 0x16
#define MB86A16_DCC1_DISTA (0x01 << 7)
#define MB86A16_DCC1_PRTY (0x01 << 6)
#define MB86A16_DCC1_CTOE (0x01 << 5)
#define MB86A16_DCC1_TBEN (0x01 << 4)
#define MB86A16_DCC1_TBO (0x01 << 3)
#define MB86A16_DCC1_NUM (0x07 << 0)
#define MB86A16_DCC2 0x17
#define MB86A16_DCC2_DCBST (0x01 << 0)
#define MB86A16_DCC3 0x18
#define MB86A16_DCC3_CODE0 (0xff << 0)
#define MB86A16_DCC4 0x19
#define MB86A16_DCC4_CODE1 (0xff << 0)
#define MB86A16_DCC5 0x1a
#define MB86A16_DCC5_CODE2 (0xff << 0)
#define MB86A16_DCC6 0x1b
#define MB86A16_DCC6_CODE3 (0xff << 0)
#define MB86A16_DCC7 0x1c
#define MB86A16_DCC7_CODE4 (0xff << 0)
#define MB86A16_DCC8 0x1d
#define MB86A16_DCC8_CODE5 (0xff << 0)
#define MB86A16_DCCOUT 0x1e
#define MB86A16_DCCOUT_DISEN (0x01 << 0)
Annotation
- Atlas domain: Driver Families / drivers/media.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.