drivers/media/dvb-frontends/mt312_priv.h

Source file repositories/reference/linux-study-clean/drivers/media/dvb-frontends/mt312_priv.h

File Facts

System
Linux kernel
Corpus path
drivers/media/dvb-frontends/mt312_priv.h
Extension
.h
Size
2697 bytes
Lines
153
Domain
Driver Families
Bucket
drivers/media
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

Driver for Zarlink MT312 QPSK Frontend

    Copyright (C) 2003 Andreas Oberritter <obi@linuxtv.org>


*/

#ifndef _DVB_FRONTENDS_MT312_PRIV
#define _DVB_FRONTENDS_MT312_PRIV

enum mt312_reg_addr {
	QPSK_INT_H = 0,
	QPSK_INT_M = 1,
	QPSK_INT_L = 2,
	FEC_INT = 3,
	QPSK_STAT_H = 4,
	QPSK_STAT_L = 5,
	FEC_STATUS = 6,
	LNB_FREQ_H = 7,
	LNB_FREQ_L = 8,
	M_SNR_H = 9,
	M_SNR_L = 10,
	VIT_ERRCNT_H = 11,
	VIT_ERRCNT_M = 12,
	VIT_ERRCNT_L = 13,
	RS_BERCNT_H = 14,
	RS_BERCNT_M = 15,
	RS_BERCNT_L = 16,
	RS_UBC_H = 17,
	RS_UBC_L = 18,
	SIG_LEVEL = 19,
	GPP_CTRL = 20,
	RESET = 21,
	DISEQC_MODE = 22,
	SYM_RATE_H = 23,
	SYM_RATE_L = 24,
	VIT_MODE = 25,
	QPSK_CTRL = 26,
	GO = 27,
	IE_QPSK_H = 28,
	IE_QPSK_M = 29,
	IE_QPSK_L = 30,
	IE_FEC = 31,
	QPSK_STAT_EN = 32,
	FEC_STAT_EN = 33,
	SYS_CLK = 34,
	DISEQC_RATIO = 35,
	DISEQC_INSTR = 36,
	FR_LIM = 37,
	FR_OFF = 38,
	AGC_CTRL = 39,
	AGC_INIT = 40,
	AGC_REF = 41,
	AGC_MAX = 42,
	AGC_MIN = 43,
	AGC_LK_TH = 44,
	TS_AGC_LK_TH = 45,
	AGC_PWR_SET = 46,
	QPSK_MISC = 47,
	SNR_THS_LOW = 48,
	SNR_THS_HIGH = 49,
	TS_SW_RATE = 50,
	TS_SW_LIM_L = 51,
	TS_SW_LIM_H = 52,
	CS_SW_RATE_1 = 53,
	CS_SW_RATE_2 = 54,
	CS_SW_RATE_3 = 55,
	CS_SW_RATE_4 = 56,
	CS_SW_LIM = 57,
	TS_LPK = 58,
	TS_LPK_M = 59,
	TS_LPK_L = 60,
	CS_KPROP_H = 61,
	CS_KPROP_L = 62,
	CS_KINT_H = 63,
	CS_KINT_L = 64,
	QPSK_SCALE = 65,
	TLD_OUTCLK_TH = 66,
	TLD_INCLK_TH = 67,
	FLD_TH = 68,
	PLD_OUTLK3 = 69,
	PLD_OUTLK2 = 70,
	PLD_OUTLK1 = 71,
	PLD_OUTLK0 = 72,
	PLD_INLK3 = 73,
	PLD_INLK2 = 74,
	PLD_INLK1 = 75,
	PLD_INLK0 = 76,
	PLD_ACC_TIME = 77,
	SWEEP_PAR = 78,

Annotation

Implementation Notes