drivers/media/i2c/adv7393.c

Source file repositories/reference/linux-study-clean/drivers/media/i2c/adv7393.c

File Facts

System
Linux kernel
Corpus path
drivers/media/i2c/adv7393.c
Extension
.c
Size
11325 bytes
Lines
463
Domain
Driver Families
Bucket
drivers/media
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct adv7393_state {
	struct v4l2_subdev sd;
	struct v4l2_ctrl_handler hdl;
	u8 reg00;
	u8 reg01;
	u8 reg02;
	u8 reg35;
	u8 reg80;
	u8 reg82;
	u32 output;
	v4l2_std_id std;
};

static inline struct adv7393_state *to_state(struct v4l2_subdev *sd)
{
	return container_of(sd, struct adv7393_state, sd);
}

static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
{
	return &container_of(ctrl->handler, struct adv7393_state, hdl)->sd;
}

static inline int adv7393_write(struct v4l2_subdev *sd, u8 reg, u8 value)
{
	struct i2c_client *client = v4l2_get_subdevdata(sd);

	return i2c_smbus_write_byte_data(client, reg, value);
}

static const u8 adv7393_init_reg_val[] = {
	ADV7393_SOFT_RESET, ADV7393_SOFT_RESET_DEFAULT,
	ADV7393_POWER_MODE_REG, ADV7393_POWER_MODE_REG_DEFAULT,

	ADV7393_HD_MODE_REG1, ADV7393_HD_MODE_REG1_DEFAULT,
	ADV7393_HD_MODE_REG2, ADV7393_HD_MODE_REG2_DEFAULT,
	ADV7393_HD_MODE_REG3, ADV7393_HD_MODE_REG3_DEFAULT,
	ADV7393_HD_MODE_REG4, ADV7393_HD_MODE_REG4_DEFAULT,
	ADV7393_HD_MODE_REG5, ADV7393_HD_MODE_REG5_DEFAULT,
	ADV7393_HD_MODE_REG6, ADV7393_HD_MODE_REG6_DEFAULT,
	ADV7393_HD_MODE_REG7, ADV7393_HD_MODE_REG7_DEFAULT,

	ADV7393_SD_MODE_REG1, ADV7393_SD_MODE_REG1_DEFAULT,
	ADV7393_SD_MODE_REG2, ADV7393_SD_MODE_REG2_DEFAULT,
	ADV7393_SD_MODE_REG3, ADV7393_SD_MODE_REG3_DEFAULT,
	ADV7393_SD_MODE_REG4, ADV7393_SD_MODE_REG4_DEFAULT,
	ADV7393_SD_MODE_REG5, ADV7393_SD_MODE_REG5_DEFAULT,
	ADV7393_SD_MODE_REG6, ADV7393_SD_MODE_REG6_DEFAULT,
	ADV7393_SD_MODE_REG7, ADV7393_SD_MODE_REG7_DEFAULT,
	ADV7393_SD_MODE_REG8, ADV7393_SD_MODE_REG8_DEFAULT,

	ADV7393_SD_TIMING_REG0, ADV7393_SD_TIMING_REG0_DEFAULT,

	ADV7393_SD_HUE_ADJUST, ADV7393_SD_HUE_ADJUST_DEFAULT,
	ADV7393_SD_CGMS_WSS0, ADV7393_SD_CGMS_WSS0_DEFAULT,
	ADV7393_SD_BRIGHTNESS_WSS, ADV7393_SD_BRIGHTNESS_WSS_DEFAULT,
};

/*
 *			    2^32
 * FSC(reg) =  FSC (HZ) * --------
 *			  27000000
 */
static const struct adv7393_std_info stdinfo[] = {
	{
		/* FSC(Hz) = 4,433,618.75 Hz */
		SD_STD_NTSC, 705268427, V4L2_STD_NTSC_443,
	}, {
		/* FSC(Hz) = 3,579,545.45 Hz */
		SD_STD_NTSC, 569408542, V4L2_STD_NTSC,
	}, {
		/* FSC(Hz) = 3,575,611.00 Hz */
		SD_STD_PAL_M, 568782678, V4L2_STD_PAL_M,
	}, {
		/* FSC(Hz) = 3,582,056.00 Hz */
		SD_STD_PAL_N, 569807903, V4L2_STD_PAL_Nc,
	}, {
		/* FSC(Hz) = 4,433,618.75 Hz */
		SD_STD_PAL_N, 705268427, V4L2_STD_PAL_N,
	}, {
		/* FSC(Hz) = 4,433,618.75 Hz */
		SD_STD_PAL_M, 705268427, V4L2_STD_PAL_60,
	}, {
		/* FSC(Hz) = 4,433,618.75 Hz */
		SD_STD_PAL_BDGHI, 705268427, V4L2_STD_PAL,
	},
};

static int adv7393_setstd(struct v4l2_subdev *sd, v4l2_std_id std)
{

Annotation

Implementation Notes