drivers/media/i2c/ccs/ccs-regs.h

Source file repositories/reference/linux-study-clean/drivers/media/i2c/ccs/ccs-regs.h

File Facts

System: Linux kernel
Corpus path: drivers/media/i2c/ccs/ccs-regs.h
Extension: .h
Size: 52541 bytes
Lines: 959
Domain: Driver Families
Bucket: drivers/media
Inferred role: Driver Families: implementation source
Status: source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

linux/bits.h
media/v4l2-cci.h

Detected Declarations

No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#ifndef __CCS_REGS_H__
#define __CCS_REGS_H__

#include <linux/bits.h>

#include <media/v4l2-cci.h>

#define CCS_FL_BASE		CCI_REG_PRIVATE_SHIFT
#define CCS_FL_FLOAT_IREAL	BIT(CCS_FL_BASE)
#define CCS_FL_IREAL		BIT(CCS_FL_BASE + 1)
#define CCS_BUILD_BUG \
	BUILD_BUG_ON(~CCI_REG_PRIVATE_MASK & (BIT(CCS_FL_BASE) | BIT(CCS_FL_BASE + 1)))
#define CCS_R_MODULE_MODEL_ID					CCI_REG16(0x0000)
#define CCS_R_MODULE_REVISION_NUMBER_MAJOR			CCI_REG8(0x0002)
#define CCS_R_FRAME_COUNT					CCI_REG8(0x0005)
#define CCS_R_PIXEL_ORDER					CCI_REG8(0x0006)
#define CCS_PIXEL_ORDER_GRBG					0U
#define CCS_PIXEL_ORDER_RGGB					1U
#define CCS_PIXEL_ORDER_BGGR					2U
#define CCS_PIXEL_ORDER_GBRG					3U
#define CCS_R_MIPI_CCS_VERSION					CCI_REG8(0x0007)
#define CCS_MIPI_CCS_VERSION_V1_0				0x10
#define CCS_MIPI_CCS_VERSION_V1_1				0x11
#define CCS_MIPI_CCS_VERSION_MAJOR_SHIFT			4U
#define CCS_MIPI_CCS_VERSION_MAJOR_MASK				0xf0
#define CCS_MIPI_CCS_VERSION_MINOR_SHIFT			0U
#define CCS_MIPI_CCS_VERSION_MINOR_MASK				0xf
#define CCS_R_DATA_PEDESTAL					CCI_REG16(0x0008)
#define CCS_R_MODULE_MANUFACTURER_ID				CCI_REG16(0x000e)
#define CCS_R_MODULE_REVISION_NUMBER_MINOR			CCI_REG8(0x0010)
#define CCS_R_MODULE_DATE_YEAR					CCI_REG8(0x0012)
#define CCS_R_MODULE_DATE_MONTH					CCI_REG8(0x0013)
#define CCS_R_MODULE_DATE_DAY					CCI_REG8(0x0014)
#define CCS_R_MODULE_DATE_PHASE					CCI_REG8(0x0015)
#define CCS_MODULE_DATE_PHASE_SHIFT				0U
#define CCS_MODULE_DATE_PHASE_MASK				0x7
#define CCS_MODULE_DATE_PHASE_TS				0U
#define CCS_MODULE_DATE_PHASE_ES				1U
#define CCS_MODULE_DATE_PHASE_CS				2U
#define CCS_MODULE_DATE_PHASE_MP				3U
#define CCS_R_SENSOR_MODEL_ID					CCI_REG16(0x0016)
#define CCS_R_SENSOR_REVISION_NUMBER				CCI_REG8(0x0018)
#define CCS_R_SENSOR_FIRMWARE_VERSION				CCI_REG8(0x001a)
#define CCS_R_SERIAL_NUMBER					CCI_REG32(0x001c)
#define CCS_R_SENSOR_MANUFACTURER_ID				CCI_REG16(0x0020)
#define CCS_R_SENSOR_REVISION_NUMBER_16				CCI_REG16(0x0022)
#define CCS_R_FRAME_FORMAT_MODEL_TYPE				CCI_REG8(0x0040)
#define CCS_FRAME_FORMAT_MODEL_TYPE_2_BYTE			1U
#define CCS_FRAME_FORMAT_MODEL_TYPE_4_BYTE			2U
#define CCS_R_FRAME_FORMAT_MODEL_SUBTYPE			CCI_REG8(0x0041)
#define CCS_FRAME_FORMAT_MODEL_SUBTYPE_ROWS_SHIFT		0U
#define CCS_FRAME_FORMAT_MODEL_SUBTYPE_ROWS_MASK		0xf
#define CCS_FRAME_FORMAT_MODEL_SUBTYPE_COLUMNS_SHIFT		4U
#define CCS_FRAME_FORMAT_MODEL_SUBTYPE_COLUMNS_MASK		0xf0
#define CCS_R_FRAME_FORMAT_DESCRIPTOR(n)			CCI_REG16(0x0042 + (n) * 2)
#define CCS_LIM_FRAME_FORMAT_DESCRIPTOR_MIN_N			0U
#define CCS_LIM_FRAME_FORMAT_DESCRIPTOR_MAX_N			14U
#define CCS_R_FRAME_FORMAT_DESCRIPTOR_4(n)			CCI_REG32(0x0060 + (n) * 4)
#define CCS_FRAME_FORMAT_DESCRIPTOR_PIXELS_SHIFT		0U
#define CCS_FRAME_FORMAT_DESCRIPTOR_PIXELS_MASK			0xfff
#define CCS_FRAME_FORMAT_DESCRIPTOR_PCODE_SHIFT			12U
#define CCS_FRAME_FORMAT_DESCRIPTOR_PCODE_MASK			0xf000
#define CCS_FRAME_FORMAT_DESCRIPTOR_PCODE_EMBEDDED		1U
#define CCS_FRAME_FORMAT_DESCRIPTOR_PCODE_DUMMY_PIXEL		2U
#define CCS_FRAME_FORMAT_DESCRIPTOR_PCODE_BLACK_PIXEL		3U
#define CCS_FRAME_FORMAT_DESCRIPTOR_PCODE_DARK_PIXEL		4U
#define CCS_FRAME_FORMAT_DESCRIPTOR_PCODE_VISIBLE_PIXEL		5U
#define CCS_FRAME_FORMAT_DESCRIPTOR_PCODE_MANUF_SPECIFIC_0	8U
#define CCS_FRAME_FORMAT_DESCRIPTOR_PCODE_MANUF_SPECIFIC_1	9U
#define CCS_FRAME_FORMAT_DESCRIPTOR_PCODE_MANUF_SPECIFIC_2	10U
#define CCS_FRAME_FORMAT_DESCRIPTOR_PCODE_MANUF_SPECIFIC_3	11U
#define CCS_FRAME_FORMAT_DESCRIPTOR_PCODE_MANUF_SPECIFIC_4	12U
#define CCS_FRAME_FORMAT_DESCRIPTOR_PCODE_MANUF_SPECIFIC_5	13U
#define CCS_FRAME_FORMAT_DESCRIPTOR_PCODE_MANUF_SPECIFIC_6	14U
#define CCS_LIM_FRAME_FORMAT_DESCRIPTOR_4_MIN_N			0U
#define CCS_LIM_FRAME_FORMAT_DESCRIPTOR_4_MAX_N			7U
#define CCS_FRAME_FORMAT_DESCRIPTOR_4_PIXELS_SHIFT		0U
#define CCS_FRAME_FORMAT_DESCRIPTOR_4_PIXELS_MASK		0xffff
#define CCS_FRAME_FORMAT_DESCRIPTOR_4_PCODE_SHIFT		28U
#define CCS_FRAME_FORMAT_DESCRIPTOR_4_PCODE_MASK		0xf0000000
#define CCS_FRAME_FORMAT_DESCRIPTOR_4_PCODE_EMBEDDED		1U
#define CCS_FRAME_FORMAT_DESCRIPTOR_4_PCODE_DUMMY_PIXEL		2U
#define CCS_FRAME_FORMAT_DESCRIPTOR_4_PCODE_BLACK_PIXEL		3U
#define CCS_FRAME_FORMAT_DESCRIPTOR_4_PCODE_DARK_PIXEL		4U
#define CCS_FRAME_FORMAT_DESCRIPTOR_4_PCODE_VISIBLE_PIXEL	5U
#define CCS_FRAME_FORMAT_DESCRIPTOR_4_PCODE_MANUF_SPECIFIC_0	8U
#define CCS_FRAME_FORMAT_DESCRIPTOR_4_PCODE_MANUF_SPECIFIC_1	9U
#define CCS_FRAME_FORMAT_DESCRIPTOR_4_PCODE_MANUF_SPECIFIC_2	10U
#define CCS_FRAME_FORMAT_DESCRIPTOR_4_PCODE_MANUF_SPECIFIC_3	11U
#define CCS_FRAME_FORMAT_DESCRIPTOR_4_PCODE_MANUF_SPECIFIC_4	12U

Annotation

Immediate include surface: `linux/bits.h`, `media/v4l2-cci.h`.
Atlas domain: Driver Families / drivers/media.
Implementation status: source implementation candidate.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.