drivers/media/i2c/et8ek8/et8ek8_mode.c
Source file repositories/reference/linux-study-clean/drivers/media/i2c/et8ek8/et8ek8_mode.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/media/i2c/et8ek8/et8ek8_mode.c- Extension
.c- Size
- 15164 bytes
- Lines
- 571
- Domain
- Driver Families
- Bucket
- drivers/media
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
et8ek8_reg.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
/*
* et8ek8_mode.c
*
* Copyright (C) 2008 Nokia Corporation
*
* Contact: Sakari Ailus <sakari.ailus@iki.fi>
* Tuukka Toivonen <tuukkat76@gmail.com>
*/
#include "et8ek8_reg.h"
/*
* Stingray sensor mode settings for Scooby
*/
/* Mode1_poweron_Mode2_16VGA_2592x1968_12.07fps */
static struct et8ek8_reglist mode1_poweron_mode2_16vga_2592x1968_12_07fps = {
/* (without the +1)
* SPCK = 80 MHz
* CCP2 = 640 MHz
* VCO = 640 MHz
* VCOUNT = 84 (2016)
* HCOUNT = 137 (3288)
* CKREF_DIV = 2
* CKVAR_DIV = 200
* VCO_DIV = 0
* SPCK_DIV = 7
* MRCK_DIV = 7
* LVDSCK_DIV = 0
*/
.type = ET8EK8_REGLIST_POWERON,
.mode = {
.sensor_width = 2592,
.sensor_height = 1968,
.sensor_window_origin_x = 0,
.sensor_window_origin_y = 0,
.sensor_window_width = 2592,
.sensor_window_height = 1968,
.width = 3288,
.height = 2016,
.window_origin_x = 0,
.window_origin_y = 0,
.window_width = 2592,
.window_height = 1968,
.pixel_clock = 80000000,
.timeperframe = {
.numerator = 100,
.denominator = 1207
},
.max_exp = 2012,
/* .max_gain = 0, */
.bus_format = MEDIA_BUS_FMT_SGRBG10_1X10,
.sensitivity = 65536
},
.regs = {
/* Need to set firstly */
{ ET8EK8_REG_8BIT, 0x126C, 0xCC },
/* Strobe and Data of CCP2 delay are minimized. */
{ ET8EK8_REG_8BIT, 0x1269, 0x00 },
/* Refined value of Min H_COUNT */
{ ET8EK8_REG_8BIT, 0x1220, 0x89 },
/* Frequency of SPCK setting (SPCK=MRCK) */
{ ET8EK8_REG_8BIT, 0x123A, 0x07 },
{ ET8EK8_REG_8BIT, 0x1241, 0x94 },
{ ET8EK8_REG_8BIT, 0x1242, 0x02 },
{ ET8EK8_REG_8BIT, 0x124B, 0x00 },
{ ET8EK8_REG_8BIT, 0x1255, 0xFF },
{ ET8EK8_REG_8BIT, 0x1256, 0x9F },
{ ET8EK8_REG_8BIT, 0x1258, 0x00 },
/* From parallel out to serial out */
{ ET8EK8_REG_8BIT, 0x125D, 0x88 },
/* From w/ embedded data to w/o embedded data */
{ ET8EK8_REG_8BIT, 0x125E, 0xC0 },
/* CCP2 out is from STOP to ACTIVE */
{ ET8EK8_REG_8BIT, 0x1263, 0x98 },
{ ET8EK8_REG_8BIT, 0x1268, 0xC6 },
{ ET8EK8_REG_8BIT, 0x1434, 0x00 },
{ ET8EK8_REG_8BIT, 0x1163, 0x44 },
{ ET8EK8_REG_8BIT, 0x1166, 0x29 },
{ ET8EK8_REG_8BIT, 0x1140, 0x02 },
{ ET8EK8_REG_8BIT, 0x1011, 0x24 },
{ ET8EK8_REG_8BIT, 0x1151, 0x80 },
{ ET8EK8_REG_8BIT, 0x1152, 0x23 },
/* Initial setting for improvement2 of lower frequency noise */
{ ET8EK8_REG_8BIT, 0x1014, 0x05 },
{ ET8EK8_REG_8BIT, 0x1033, 0x06 },
{ ET8EK8_REG_8BIT, 0x1034, 0x79 },
{ ET8EK8_REG_8BIT, 0x1423, 0x3F },
{ ET8EK8_REG_8BIT, 0x1424, 0x3F },
Annotation
- Immediate include surface: `et8ek8_reg.h`.
- Atlas domain: Driver Families / drivers/media.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.