drivers/media/i2c/imx258.c

Source file repositories/reference/linux-study-clean/drivers/media/i2c/imx258.c

File Facts

System
Linux kernel
Corpus path
drivers/media/i2c/imx258.c
Extension
.c
Size
43499 bytes
Lines
1569
Domain
Driver Families
Bucket
drivers/media
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct imx258_reg_list {
	u32 num_of_regs;
	const struct cci_reg_sequence *regs;
};

struct imx258_link_cfg {
	unsigned int lf_to_pix_rate_factor;
	struct imx258_reg_list reg_list;
};

enum {
	IMX258_2_LANE_MODE,
	IMX258_4_LANE_MODE,
	IMX258_LANE_CONFIGS,
};

/* Link frequency config */
struct imx258_link_freq_config {
	u32 pixels_per_line;

	/* Configuration for this link frequency / num lanes selection */
	struct imx258_link_cfg link_cfg[IMX258_LANE_CONFIGS];
};

/* Mode : resolution and related config&values */
struct imx258_mode {
	/* Frame width */
	u32 width;
	/* Frame height */
	u32 height;

	/* V-timing */
	u32 vts_def;
	u32 vts_min;

	/* Index of Link frequency config to be used */
	u32 link_freq_index;
	/* Default register values */
	struct imx258_reg_list reg_list;

	/* Analog crop rectangle */
	struct v4l2_rect crop;
};

/*
 * 4208x3120 @ 30 fps needs 1267Mbps/lane, 4 lanes.
 * To avoid further computation of clock settings, adopt the same per
 * lane data rate when using 2 lanes, thus allowing a maximum of 15fps.
 */
static const struct cci_reg_sequence mipi_1267mbps_19_2mhz_2l[] = {
	{ IMX258_REG_EXCK_FREQ, 0x1333 },
	{ IMX258_REG_IVTPXCK_DIV, 10 },
	{ IMX258_REG_IVTSYCK_DIV, 2 },
	{ IMX258_REG_PREPLLCK_VT_DIV, 3 },
	{ IMX258_REG_PLL_IVT_MPY, 198 },
	{ IMX258_REG_IOPPXCK_DIV, 10 },
	{ IMX258_REG_IOPSYCK_DIV, 1 },
	{ IMX258_REG_PREPLLCK_OP_DIV, 2 },
	{ IMX258_REG_PLL_IOP_MPY, 216 },
	{ IMX258_REG_PLL_MULT_DRIV, 0 },

	{ IMX258_REG_CSI_LANE_MODE, 1 },
	{ IMX258_REG_REQ_LINK_BIT_RATE_MBPS_H, 1267 * 2 },
	{ IMX258_REG_REQ_LINK_BIT_RATE_MBPS_L, 0 },
};

static const struct cci_reg_sequence mipi_1267mbps_19_2mhz_4l[] = {
	{ IMX258_REG_EXCK_FREQ, 0x1333 },
	{ IMX258_REG_IVTPXCK_DIV, 5 },
	{ IMX258_REG_IVTSYCK_DIV, 2 },
	{ IMX258_REG_PREPLLCK_VT_DIV, 3 },
	{ IMX258_REG_PLL_IVT_MPY, 198 },
	{ IMX258_REG_IOPPXCK_DIV, 10 },
	{ IMX258_REG_IOPSYCK_DIV, 1 },
	{ IMX258_REG_PREPLLCK_OP_DIV, 2 },
	{ IMX258_REG_PLL_IOP_MPY, 216 },
	{ IMX258_REG_PLL_MULT_DRIV, 0 },

	{ IMX258_REG_CSI_LANE_MODE, 3 },
	{ IMX258_REG_REQ_LINK_BIT_RATE_MBPS_H, 1267 * 4 },
	{ IMX258_REG_REQ_LINK_BIT_RATE_MBPS_L, 0 },
};

static const struct cci_reg_sequence mipi_1272mbps_24mhz_2l[] = {
	{ IMX258_REG_EXCK_FREQ, 0x1800 },
	{ IMX258_REG_IVTPXCK_DIV, 10 },
	{ IMX258_REG_IVTSYCK_DIV, 2 },
	{ IMX258_REG_PREPLLCK_VT_DIV, 4 },
	{ IMX258_REG_PLL_IVT_MPY, 212 },
	{ IMX258_REG_IOPPXCK_DIV, 10 },

Annotation

Implementation Notes