drivers/media/i2c/og0ve1b.c

Source file repositories/reference/linux-study-clean/drivers/media/i2c/og0ve1b.c

File Facts

System
Linux kernel
Corpus path
drivers/media/i2c/og0ve1b.c
Extension
.c
Size
22347 bytes
Lines
842
Domain
Driver Families
Bucket
drivers/media
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct og0ve1b_reg_list {
	const struct cci_reg_sequence *regs;
	unsigned int num_regs;
};

struct og0ve1b_mode {
	u32 width;	/* Frame width in pixels */
	u32 height;	/* Frame height in pixels */
	u32 hts;	/* Horizontal timing size */
	u32 vts;	/* Default vertical timing size */
	u32 bpp;	/* Bits per pixel */

	const struct og0ve1b_reg_list reg_list;	/* Sensor register setting */
};

static const char * const og0ve1b_test_pattern_menu[] = {
	"Disabled",
	"Vertical Colour Bars",
};

static const char * const og0ve1b_supply_names[] = {
	"avdd",		/* Analog power */
	"dovdd",	/* Digital I/O power */
	"dvdd",		/* Digital core power */
};

#define OG0VE1B_NUM_SUPPLIES	ARRAY_SIZE(og0ve1b_supply_names)

struct og0ve1b {
	struct device *dev;
	struct regmap *regmap;
	struct clk *xvclk;
	struct gpio_desc *reset_gpio;
	struct regulator_bulk_data supplies[OG0VE1B_NUM_SUPPLIES];

	struct v4l2_subdev sd;
	struct media_pad pad;

	struct v4l2_ctrl *vblank;
	struct v4l2_ctrl *exposure;
	struct v4l2_ctrl_handler ctrl_handler;

	/* Saved register value */
	u64 pre_isp;
};

static const struct cci_reg_sequence og0ve1b_640x480_120fps_mode[] = {
	{ CCI_REG8(0x30a0), 0x02 },
	{ CCI_REG8(0x30a1), 0x00 },
	{ CCI_REG8(0x30a2), 0x48 },
	{ CCI_REG8(0x30a3), 0x34 },
	{ CCI_REG8(0x30a4), 0xf7 },
	{ CCI_REG8(0x30a5), 0x00 },
	{ CCI_REG8(0x3082), 0x32 },
	{ CCI_REG8(0x3083), 0x01 },
	{ CCI_REG8(0x301c), 0xf0 },
	{ CCI_REG8(0x301e), 0x0b },
	{ CCI_REG8(0x3106), 0x10 },
	{ CCI_REG8(0x3708), 0x77 },
	{ CCI_REG8(0x3709), 0xf8 },
	{ CCI_REG8(0x3717), 0x00 },
	{ CCI_REG8(0x3782), 0x00 },
	{ CCI_REG8(0x3783), 0x47 },
	{ CCI_REG8(0x37a2), 0x00 },
	{ CCI_REG8(0x3503), 0x07 },
	{ CCI_REG8(0x3509), 0x10 },
	{ CCI_REG8(0x3600), 0x83 },
	{ CCI_REG8(0x3601), 0x21 },
	{ CCI_REG8(0x3602), 0xf1 },
	{ CCI_REG8(0x360a), 0x18 },
	{ CCI_REG8(0x360e), 0xb3 },
	{ CCI_REG8(0x3613), 0x20 },
	{ CCI_REG8(0x366a), 0x78 },
	{ CCI_REG8(0x3706), 0x63 },
	{ CCI_REG8(0x3713), 0x00 },
	{ CCI_REG8(0x3716), 0xb0 },
	{ CCI_REG8(0x37a1), 0x38 },
	{ CCI_REG8(0x3800), 0x00 },
	{ CCI_REG8(0x3801), 0x04 },
	{ CCI_REG8(0x3802), 0x00 },
	{ CCI_REG8(0x3803), 0x04 },
	{ CCI_REG8(0x3804), 0x02 },
	{ CCI_REG8(0x3805), 0x8b },
	{ CCI_REG8(0x3806), 0x01 },
	{ CCI_REG8(0x3807), 0xeb },
	{ CCI_REG8(0x3808), 0x02 },	/* output width */
	{ CCI_REG8(0x3809), 0x80 },
	{ CCI_REG8(0x380a), 0x01 },	/* output height */
	{ CCI_REG8(0x380b), 0xe0 },
	{ CCI_REG8(0x380c), 0x03 },	/* horizontal timing size */

Annotation

Implementation Notes