drivers/media/i2c/ov2735.c

Source file repositories/reference/linux-study-clean/drivers/media/i2c/ov2735.c

File Facts

System
Linux kernel
Corpus path
drivers/media/i2c/ov2735.c
Extension
.c
Size
31504 bytes
Lines
1110
Domain
Driver Families
Bucket
drivers/media
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct ov2735_pll_parameters {
	u8 pll_nc;
	u8 pll_mc;
	u8 pll_outdiv;
};

struct ov2735 {
	struct device *dev;
	struct regmap *cci;
	struct v4l2_subdev sd;
	struct media_pad pad;
	struct clk *xclk;
	struct gpio_desc *reset_gpio;
	struct gpio_desc *enable_gpio;
	struct regulator_bulk_data supplies[ARRAY_SIZE(ov2735_supply_name)];

	/* V4L2 Controls */
	struct v4l2_ctrl_handler handler;
	struct v4l2_ctrl *link_freq;
	struct v4l2_ctrl *pixel_rate;
	struct v4l2_ctrl *hblank;
	struct v4l2_ctrl *vblank;
	struct v4l2_ctrl *gain;
	struct v4l2_ctrl *exposure;
	struct v4l2_ctrl *test_pattern;

	u32 link_freq_index;

	u8 current_page;
	struct mutex page_lock;
};

struct ov2735_mode {
	u32 width;
	u32 height;
	u32 hts_def;
	u32 vts_def;
	u32 exp_def;
	struct v4l2_rect crop;
};

static const struct cci_reg_sequence ov2735_common_regs[] = {
	{ OV2735_REG_CLK_MODE,			0x15 },
	{ OV2735_REG_CLOCK_REG1,		0x01 },
	{ OV2735_REG_CLOCK_REG2,		0x20 },
	{ OV2735_REG_BINNING_DAC_CODE_MODE,	0x00 },
	{ OV2735_REG_ABL,			0x73 },
	{ OV2735_REG_FRAME_SYNC,		0x01 },

	/* Timing ctrl */
	{ OV2735_REG_TIMING_CTRL2,		0x6b },
	{ OV2735_REG_TIMING_CTRL3,		0xea },
	{ OV2735_REG_TIMING_CTRL1,		0x0c },
	{ OV2735_REG_RST_NUM,			0x0063 },
	{ OV2735_REG_RST_NUM2,			0x006f },
	{ OV2735_REG_BOOST_EN,			0x02 },
	{ OV2735_REG_B2_NUM,			0x0120 },
	{ OV2735_REG_B4_NUM,			0x042a },
	{ OV2735_REG_PIXEL_CYCLE_P0,		0x00 },
	{ OV2735_REG_PIXEL_CYCLE_P1,		0x2c },
	{ OV2735_REG_PIXEL_CYCLE_P2,		0x29 },
	{ OV2735_REG_PIXEL_CYCLE_P3,		0x00 },
	{ OV2735_REG_PIXEL_CYCLE_P5,		0x44 },
	{ OV2735_REG_PIXEL_CYCLE_P7,		0x0029 },
	{ OV2735_REG_PIXEL_CYCLE_P9,		0x00 },
	{ OV2735_REG_PIXEL_CYCLE_P10,		0x00 },
	{ OV2735_REG_PIXEL_CYCLE_P12,		0x00 },
	{ OV2735_REG_PIXEL_CYCLE_P18,		0x2f },
	{ OV2735_REG_PIXEL_CYCLE_P20,		0x62 },
	{ OV2735_REG_PIXEL_CYCLE_P22,		0x5b },
	{ OV2735_REG_PIXEL_CYCLE_P33,		0x0046 },
	{ OV2735_REG_PIXEL_CYCLE_P34,		0x36 },
	{ OV2735_REG_PIXEL_CYCLE_P35_P36,	0x4f },
	{ OV2735_REG_PIXEL_CYCLE_P37_P38,	0xef },
	{ OV2735_REG_PIXEL_CYCLE_P31,		0xcf },
	{ OV2735_REG_PIXEL_CYCLE_P32,		0x36 },
	{ OV2735_REG_PIXEL_CYCLE_P44,		0x0d },
	{ OV2735_REG_PIXEL_CYCLE_P45,		0x0d },
	{ OV2735_REG_PIXEL_BIAS_CTRL_RH_RL,	0x77 },
	{ OV2735_REG_PIXEL_BIAS_CTRL_SH_SL,	0x77 },

	/* Analog ctrl */
	{ OV2735_REG_ANALOG_CTRL4,		0x5a },
	{ OV2735_REG_ANALOG_CTRL5,		0x01 },
	{ OV2735_REG_ANALOG_CTRL6,		0xd2 },
	{ OV2735_REG_ANALOG_CTRL8,		0x40 },
	{ OV2735_REG_PCP_RST_SEL,		0x00 },
	{ OV2735_REG_ICOMP,			0xc3 },

	{ OV2735_REG_HS_MIPI,			0x83 },

Annotation

Implementation Notes